From 7ebe201f9632134da6c32d8a21444cb0e1d909ad Mon Sep 17 00:00:00 2001 From: nick6x Date: Sun, 30 Jul 2017 11:53:55 -0700 Subject: [PATCH] Determine ISR on #define --- examples/SimpleSin/SimpleSin.ino | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/examples/SimpleSin/SimpleSin.ino b/examples/SimpleSin/SimpleSin.ino index 06a9ef8..50be57d 100644 --- a/examples/SimpleSin/SimpleSin.ino +++ b/examples/SimpleSin/SimpleSin.ino @@ -9,6 +9,7 @@ #define PWM_PIN 3 +#define DDS_USE_ONLY_TIMER2 false #define TIMER2_PHASE_ADVANCE 24 DDS dds; @@ -18,7 +19,7 @@ void setup() { digitalWrite(PWM_PIN, LOW); dds.start(); - dds.startPhaseAccumulator(false); + dds.startPhaseAccumulator(DDS_USE_ONLY_TIMER2); dds.playWait(600, 3000); dds.on(); //dds.setAmplitude(31); @@ -29,16 +30,15 @@ void loop() { } -//Uncomment if using dds.startPhaseAccumulator(true); -/*ISR(TIMER2_OVF_vect) { +#if DDS_USE_ONLY_TIMER2 +ISR(TIMER2_OVF_vect) { static unsigned char tcnt = 0; if(++tcnt == TIMER2_PHASE_ADVANCE) { tcnt = 0; dds.clockTick(); } -}*/ - -//Comment if using dds.startPhaseAccumulator(true); +} +#else // Use the ADC timer instead ISR(ADC_vect) { if(false){ static unsigned char tcnt = 0; @@ -49,3 +49,4 @@ ISR(ADC_vect) { dds.clockTick(); } } +#endif \ No newline at end of file