Replace local DDS with the DDS class.

This commit is contained in:
Stephen Olesen 2015-07-01 18:25:59 -06:00
parent 660fe0c602
commit 5689393c11
2 changed files with 19 additions and 64 deletions

View File

@ -14,62 +14,15 @@
#define PPOOL_SIZE 2
#define COMPARE_BITS 6
#define ACCUMULATOR_SIZE 32
#define ACCUMULATOR_BITS 24 // This is 2^10 bits used from accum
//#undef PROGMEM
//#define PROGMEM __attribute__((section(".progmem.data")))
const uint8_t PROGMEM sinetable[256] = {
128,131,134,137,140,143,146,149,152,156,159,162,165,168,171,174,
176,179,182,185,188,191,193,196,199,201,204,206,209,211,213,216,
218,220,222,224,226,228,230,232,234,236,237,239,240,242,243,245,
246,247,248,249,250,251,252,252,253,254,254,255,255,255,255,255,
255,255,255,255,255,255,254,254,253,252,252,251,250,249,248,247,
246,245,243,242,240,239,237,236,234,232,230,228,226,224,222,220,
218,216,213,211,209,206,204,201,199,196,193,191,188,185,182,179,
176,174,171,168,165,162,159,156,152,149,146,143,140,137,134,131,
128,124,121,118,115,112,109,106,103,99, 96, 93, 90, 87, 84, 81,
79, 76, 73, 70, 67, 64, 62, 59, 56, 54, 51, 49, 46, 44, 42, 39,
37, 35, 33, 31, 29, 27, 25, 23, 21, 19, 18, 16, 15, 13, 12, 10,
9, 8, 7, 6, 5, 4, 3, 3, 2, 1, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 1, 1, 2, 3, 3, 4, 5, 6, 7, 8,
9, 10, 12, 13, 15, 16, 18, 19, 21, 23, 25, 27, 29, 31, 33, 35,
37, 39, 42, 44, 46, 49, 51, 54, 56, 59, 62, 64, 67, 70, 73, 76,
79, 81, 84, 87, 90, 93, 96, 99, 103,106,109,112,115,118,121,124
};
#define AFSK_SPACE 0
#define AFSK_MARK 1
#define AFSK_SPACE 2200
#define AFSK_MARK 1200
// Timers
volatile unsigned long lastTx = 0;
volatile unsigned long lastTxEnd = 0;
volatile unsigned long lastRx = 0;
#define REFCLK 38400
//#define REFCLK 31372.54902
//#define REFCLK (16000000.0/510.0)
//#define REFCLK 31200.0
// 2200Hz = pow(2,32)*2200.0/refclk
// 1200Hz = pow(2,32)*1200.0/refclk
static const unsigned long toneStep[2] = {
(2200.0/REFCLK)*pow(2,ACCUMULATOR_SIZE),
(1200.0/REFCLK)*pow(2,ACCUMULATOR_SIZE)
};
// Set to an arbitrary frequency
void AFSK::Encoder::setFreq(unsigned long freq, byte vol) {
unsigned long newStep = pow(2,32)*freq/REFCLK;
rStep = newStep; // Atomic? (ish)
}
// This allows a programmatic way to tune the output tones
static const byte toneVolume[2] = {
255,
255
};
#define T_BIT ((unsigned int)(REFCLK/1200))
#define T_BIT ((unsigned int)(9600/1200))
void AFSK::Encoder::process() {
// Check what clock pulse we're on
@ -143,9 +96,11 @@ void AFSK::Encoder::process() {
if(++bitClock == T_BIT)
bitClock = 0;
accumulator += toneStep[currentTone];
uint8_t phAng = (accumulator >> ACCUMULATOR_BITS);
OCR2B = pgm_read_byte_near(sinetable + phAng)>>(8-COMPARE_BITS);
if(currentTone == 0) {
dds->setFrequency(AFSK_SPACE);
} else {
dds->setFrequency(AFSK_MARK);
}
}
bool AFSK::Encoder::start() {
@ -157,7 +112,6 @@ bool AFSK::Encoder::start() {
return false;
}
accumulator = 0;
// First real byte is a frame
currentBit = 0;
lastZero = 0;
@ -170,6 +124,8 @@ bool AFSK::Encoder::start() {
currentBytePos = 0;
maxTx = 3;
sending = true;
dds->setFrequency(0);
dds->on();
return true;
}
@ -177,7 +133,7 @@ void AFSK::Encoder::stop() {
randomWait = 0;
sending = false;
done = true;
OCR2B = 0;
dds->off();
}
AFSK::Decoder::Decoder() {
@ -365,7 +321,7 @@ bool AFSK::Decoder::read() {
void AFSK::Decoder::start() {
// Do this in start to allocate our first packet
currentPacket = pBuf.makePacket(PACKET_MAX_LEN);
ASSR &= ~(_BV(EXCLK) | _BV(AS2));
/* ASSR &= ~(_BV(EXCLK) | _BV(AS2));
// Do non-inverting PWM on pin OC2B (arduino pin 3) (p.159).
// OC2A (arduino pin 11) stays in normal port operation:
@ -387,7 +343,7 @@ void AFSK::Decoder::start() {
PORTC &= ~_BV(0);
DIDR0 |= _BV(0);
ADCSRB = _BV(ADTS2) | _BV(ADTS1) | _BV(ADTS0);
ADCSRA = _BV(ADEN) | _BV(ADSC) | _BV(ADATE) | _BV(ADIE) | _BV(ADPS2); // | _BV(ADPS0);
ADCSRA = _BV(ADEN) | _BV(ADSC) | _BV(ADATE) | _BV(ADIE) | _BV(ADPS2); // | _BV(ADPS0); */
}
AFSK::PacketBuffer::PacketBuffer() {
@ -511,7 +467,8 @@ void AFSK::timer() {
decoder.process(ADCH - 128);
}
void AFSK::start() {
void AFSK::start(DDS *dds) {
afskEnabled = true;
encoder.setDDS(dds);
decoder.start();
}

10
AFSK.h
View File

@ -3,6 +3,7 @@
#include <Arduino.h>
#include <SimpleFIFO.h>
#include <DDS.h>
#define SAMPLERATE 9600
#define BITRATE 1200
@ -142,7 +143,7 @@ public:
packet = 0x0;
currentBytePos = 0;
}
void setFreq(unsigned long, byte);
void setDDS(DDS *d) { dds = d; }
volatile inline bool isSending() volatile {
return sending;
}
@ -177,10 +178,7 @@ public:
unsigned char currentBytePos;
volatile unsigned long randomWait;
volatile bool done;
// Phase accumulator, 32 bits, we'll use ACCUMULATOR_BITS of it
unsigned long accumulator;
// Current radian step for the accumulator
unsigned long rStep;
DDS *dds;
};
class HDLCDecode {
@ -258,7 +256,7 @@ public:
}
//unsigned long lastTx;
//unsigned long lastRx;
void start();
void start(DDS *);
void timer();
Encoder encoder;
Decoder decoder;