update vox and mic signal strength reading

This commit is contained in:
Morgan Redfield 2019-01-19 11:42:39 -08:00
parent 6c891c9f32
commit 6b05b7754d
2 changed files with 26 additions and 15 deletions

View File

@ -938,20 +938,19 @@ bool HamShield::getVoxOn(){
// Vox Threshold // Vox Threshold
void HamShield::setVoxOpenThresh(uint16_t vox_open_thresh){ void HamShield::setVoxOpenThresh(uint16_t vox_open_thresh){
// When vssi > th_h_vox, then vox will be 1(unit mV ) // When vssi > th_h_vox, then vox will be 1(unit mV )
HSwriteWord(devAddr, A1846S_TH_H_VOX_REG, vox_open_thresh); HSwriteBitsW(devAddr, A1846S_TH_H_VOX_REG, A1846S_TH_H_VOX_BIT, A1846S_TH_H_VOX_LEN, vox_open_thresh);
} }
uint16_t HamShield::getVoxOpenThresh(){ uint16_t HamShield::getVoxOpenThresh(){
HSreadWord(devAddr, A1846S_TH_H_VOX_REG, radio_i2c_buf); HSreadBitsW(devAddr, A1846S_TH_H_VOX_REG, A1846S_TH_H_VOX_BIT, A1846S_TH_H_VOX_LEN, radio_i2c_buf);
return radio_i2c_buf[0]; return radio_i2c_buf[0];
} }
void HamShield::setVoxShutThresh(uint16_t vox_shut_thresh){ void HamShield::setVoxShutThresh(uint16_t vox_shut_thresh){
// When vssi < th_l_vox && time delay meet, then vox will be 0 (unit mV ) // When vssi < th_l_vox && time delay meet, then vox will be 0 (unit mV )
HSwriteWord(devAddr, A1846S_TH_L_VOX_REG, vox_shut_thresh); HSwriteBitsW(devAddr, A1846S_TH_L_VOX_REG, A1846S_TH_L_VOX_BIT, A1846S_TH_L_VOX_LEN, vox_shut_thresh);
} }
uint16_t HamShield::getVoxShutThresh(){ uint16_t HamShield::getVoxShutThresh(){
HSreadWord(devAddr, A1846S_TH_L_VOX_REG, radio_i2c_buf); HSreadBitsW(devAddr, A1846S_TH_L_VOX_REG, A1846S_TH_L_VOX_BIT, A1846S_TH_L_VOX_LEN, radio_i2c_buf);
return radio_i2c_buf[0]; return radio_i2c_buf[0];
} }
@ -1295,9 +1294,14 @@ int16_t HamShield::readRSSI(){
return rssi; return rssi;
} }
uint16_t HamShield::readVSSI(){ uint16_t HamShield::readVSSI(){
HSreadWord(devAddr, A1846S_VSSI_REG, radio_i2c_buf); HSreadBitsW(devAddr, A1846S_VSSI_REG, A1846S_VSSI_BIT, A1846S_VSSI_LENGTH, radio_i2c_buf);
return radio_i2c_buf[0] & 0x7FF; // only need lowest 10 bits return radio_i2c_buf[0];
}
uint16_t HamShield::readMSSI(){
HSreadBitsW(devAddr, A1846S_VSSI_REG, A1846S_MSSI_BIT, A1846S_MSSI_LENGTH, radio_i2c_buf);
return radio_i2c_buf[0];
} }

View File

@ -38,8 +38,8 @@
//#define A1846S_ADCLK_FREQ_REG 0x2C // adclk_freq<15:0> //#define A1846S_ADCLK_FREQ_REG 0x2C // adclk_freq<15:0>
#define A1846S_INT_MODE_REG 0x2D // interrupt enables #define A1846S_INT_MODE_REG 0x2D // interrupt enables
#define A1846S_TX_VOICE_REG 0x3A // tx voice control reg #define A1846S_TX_VOICE_REG 0x3A // tx voice control reg
#define A1846S_TH_H_VOX_REG 0x41 // register holds vox high (open) threshold bits #define A1846S_TH_H_VOX_REG 0x64 // register holds vox high (open) threshold bits
#define A1846S_TH_L_VOX_REG 0x42 // register holds vox low (shut) threshold bits #define A1846S_TH_L_VOX_REG 0x64 // register holds vox low (shut) threshold bits
#define A1846S_FM_DEV_REG 0x43 // register holds fm deviation settings #define A1846S_FM_DEV_REG 0x43 // register holds fm deviation settings
#define A1846S_RX_VOLUME_REG 0x44 // register holds RX volume settings #define A1846S_RX_VOLUME_REG 0x44 // register holds RX volume settings
#define A1846S_SQ_OPEN_THRESH_REG 0x48 // see sq #define A1846S_SQ_OPEN_THRESH_REG 0x48 // see sq
@ -115,7 +115,7 @@
#define A1846S_TXON_RF_INT_BIT 7 // txon_rf_uint16_t enable #define A1846S_TXON_RF_INT_BIT 7 // txon_rf_uint16_t enable
#define A1846S_CTCSS_PHASE_INT_BIT 5 // ctcss phase shift detect uint16_t enable #define A1846S_CTCSS_PHASE_INT_BIT 5 // ctcss phase shift detect uint16_t enable
#define A1846S_IDLE_TIMEOUT_INT_BIT 4 // idle state time out uint16_t enable #define A1846S_IDLE_TIMEOUT_INT_BIT 4 // idle state time out uint16_t enable
#define A1846S_RXON_RF_TIMeOUT_INT_BIT 3 // rxon_rf timerout uint16_t enable #define A1846S_RXON_RF_TIMEOUT_INT_BIT 3 // rxon_rf timerout uint16_t enable
#define A1846S_SQ_INT_BIT 2 // sq uint16_t enable #define A1846S_SQ_INT_BIT 2 // sq uint16_t enable
#define A1846S_TXON_RF_TIMEOUT_INT_BIT 1 // txon_rf time out uint16_t enable #define A1846S_TXON_RF_TIMEOUT_INT_BIT 1 // txon_rf time out uint16_t enable
#define A1846S_VOX_INT_BIT 0 // vox uint16_t enable #define A1846S_VOX_INT_BIT 0 // vox uint16_t enable
@ -126,8 +126,12 @@
#define A1846S_CTCSS_DET_BIT 5 #define A1846S_CTCSS_DET_BIT 5
// Bitfields for A1846S_TH_H_VOX_REG // Bitfields for A1846S_TH_H_VOX_REG
#define A1846S_TH_H_VOX_BIT 14 // th_h_vox<14:0> #define A1846S_TH_H_VOX_BIT 13 // th_h_vox<13:7>
#define A1846S_TH_H_VOX_LENGTH 15 #define A1846S_TH_H_VOX_LEN 7
// Bitfields for A1846S_TH_L_VOX_REG
#define A1846S_TH_L_VOX_BIT 6 // th_l_vox<6:0>
#define A1846S_TH_L_VOX_LEN 7
// Bitfields for A1846S_FM_DEV_REG // Bitfields for A1846S_FM_DEV_REG
#define A1846S_FM_DEV_VOICE_BIT 12 // CTCSS/CDCSS and voice deviation <6:0> #define A1846S_FM_DEV_VOICE_BIT 12 // CTCSS/CDCSS and voice deviation <6:0>
@ -182,8 +186,10 @@
#define A1846S_RSSI_LENGTH 8 #define A1846S_RSSI_LENGTH 8
// Bitfields for A1846S_VSSI_REG // Bitfields for A1846S_VSSI_REG
#define A1846S_VSSI_BIT 14 // voice signal strength indicator <14:0> (unit mV) #define A1846S_VSSI_BIT 15 // voice signal strength indicator <7:0> (unit 0.5dB)
#define A1846S_VSSI_LENGTH 15 #define A1846S_VSSI_LENGTH 8
#define A1846S_MSSI_BIT 7 // mic signal strength <7:0> (unit 0.5 dB)
#define A1846S_MSSI_LENGTH 8
// Bitfields for A1846S_DTMF_ENABLE_REG // Bitfields for A1846S_DTMF_ENABLE_REG
#define A1846S_DTMF_ENABLE_BIT 15 #define A1846S_DTMF_ENABLE_BIT 15
@ -466,6 +472,7 @@ class HamShield {
// Read Only Status Registers // Read Only Status Registers
int16_t readRSSI(); int16_t readRSSI();
uint16_t readVSSI(); uint16_t readVSSI();
uint16_t readMSSI();
// set output power of radio // set output power of radio
void setRfPower(uint8_t pwr); void setRfPower(uint8_t pwr);