Initial import of the main code from https://github.com/slepp/AX25
Partially functional, but no accuracy tests complete yet.
This commit is contained in:
Stephen Olesen
parent
6a5815d9b5
commit
9b2987de08
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@ -0,0 +1,507 @@
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#include <Arduino.h>
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#include "HamShield.h"
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#include "SimpleFIFO.h"
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#include <util/atomic.h>
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#define PHASE_BIT 8
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#define PHASE_INC 1
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#define PHASE_MAX (SAMPLEPERBIT * PHASE_BIT)
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#define PHASE_THRES (PHASE_MAX / 2)
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#define BIT_DIFFER(bitline1, bitline2) (((bitline1) ^ (bitline2)) & 0x01)
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#define EDGE_FOUND(bitline) BIT_DIFFER((bitline), (bitline) >> 1)
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#define PPOOL_SIZE 2
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#define ACCUMULATOR_BITS 24 // This is 2^10 bits used from accum
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//#undef PROGMEM
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//#define PROGMEM __attribute__((section(".progmem.data")))
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const uint8_t PROGMEM sinetable[256] = {
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128,131,134,137,140,143,146,149,152,156,159,162,165,168,171,174,
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176,179,182,185,188,191,193,196,199,201,204,206,209,211,213,216,
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218,220,222,224,226,228,230,232,234,236,237,239,240,242,243,245,
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246,247,248,249,250,251,252,252,253,254,254,255,255,255,255,255,
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255,255,255,255,255,255,254,254,253,252,252,251,250,249,248,247,
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246,245,243,242,240,239,237,236,234,232,230,228,226,224,222,220,
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218,216,213,211,209,206,204,201,199,196,193,191,188,185,182,179,
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176,174,171,168,165,162,159,156,152,149,146,143,140,137,134,131,
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128,124,121,118,115,112,109,106,103,99, 96, 93, 90, 87, 84, 81,
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79, 76, 73, 70, 67, 64, 62, 59, 56, 54, 51, 49, 46, 44, 42, 39,
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37, 35, 33, 31, 29, 27, 25, 23, 21, 19, 18, 16, 15, 13, 12, 10,
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9, 8, 7, 6, 5, 4, 3, 3, 2, 1, 1, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 1, 1, 2, 3, 3, 4, 5, 6, 7, 8,
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9, 10, 12, 13, 15, 16, 18, 19, 21, 23, 25, 27, 29, 31, 33, 35,
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37, 39, 42, 44, 46, 49, 51, 54, 56, 59, 62, 64, 67, 70, 73, 76,
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79, 81, 84, 87, 90, 93, 96, 99, 103,106,109,112,115,118,121,124
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};
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#define AFSK_SPACE 0
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#define AFSK_MARK 1
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// Timers
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volatile unsigned long lastTx = 0;
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volatile unsigned long lastTxEnd = 0;
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volatile unsigned long lastRx = 0;
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#define REFCLK 9600
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//#define REFCLK 31372.54902
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//#define REFCLK (16000000.0/510.0)
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//#define REFCLK 31200.0
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// 2200Hz = pow(2,32)*2200.0/refclk
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// 1200Hz = pow(2,32)*1200.0/refclk
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static const unsigned long toneStep[2] = {
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pow(2,32)*2200.0/REFCLK,
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pow(2,32)*1200.0/REFCLK
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};
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// Set to an arbitrary frequency
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void AFSK::Encoder::setFreq(unsigned long freq, byte vol) {
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unsigned long newStep = pow(2,32)*freq/REFCLK;
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rStep = newStep; // Atomic? (ish)
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}
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// This allows a programmatic way to tune the output tones
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static const byte toneVolume[2] = {
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255,
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255
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};
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#define T_BIT ((unsigned int)(REFCLK/1200))
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void AFSK::Encoder::process() {
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// Check what clock pulse we're on
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if(bitClock == 0) { // We are onto our next bit timing
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// We're on the start of a byte position, so fetch one
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if(bitPosition == 0) {
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if(preamble) { // Still in preamble
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currentByte = HDLC_PREAMBLE;
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--preamble; // Decrement by one
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} else {
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if(!packet) { // We aren't on a packet, grab one
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// Unless we already sent enough
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if(maxTx-- == 0) {
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stop();
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lastTxEnd = millis();
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return;
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}
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packet = pBuf.getPacket();
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if(!packet) { // There actually weren't any
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stop(); // Stop transmitting and return
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lastTxEnd = millis();
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return;
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}
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lastTx = millis();
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currentBytePos = 0;
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}
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// We ran out of actual data, provide an HDLC frame (idle)
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if(currentBytePos++ == packet->len) {
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pBuf.freePacket(packet);
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packet = pBuf.getPacket(); // Get the next, if any
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currentBytePos = 0;
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currentByte = HDLC_FRAME;
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hdlc = true;
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} else {
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// Grab the next byte
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currentByte = packet->getByte(); //[currentBytePos++];
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if(currentByte == HDLC_ESCAPE) {
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currentByte = packet->getByte(); //[currentBytePos++];
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hdlc = true;
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} else {
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hdlc = false;
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}
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}
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}
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}
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// Pickup the last bit
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currentBit = currentByte & 0x1;
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if(lastZero == 5) {
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currentBit = 0; // Force a 0 bit output
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} else {
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currentByte >>= 1; // Bit shift it right, for the next round
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++bitPosition; // Note our increase in position
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}
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// To handle NRZI 5 bit stuffing, count the bits
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if(!currentBit || hdlc)
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lastZero = 0;
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else
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++lastZero;
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// NRZI and AFSK uses toggling 0s, "no change" on 1
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// So, if not a 1, toggle to the opposite tone
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if(!currentBit)
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currentTone = !currentTone;
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}
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// Advance the bitclock here, to let first bit be sent early
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if(++bitClock == T_BIT)
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bitClock = 0;
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accumulator += toneStep[currentTone];
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uint8_t phAng = (accumulator >> ACCUMULATOR_BITS);
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/*if(toneVolume[currentTone] != 255) {
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OCR2B = pwm * toneVolume[currentTone] / 255;
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} else {*/
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// No volume scaling required
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OCR2B = pgm_read_byte_near(sinetable + phAng);
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/*}*/
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}
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bool AFSK::Encoder::start() {
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if(!done || sending) {
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return false;
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}
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if(randomWait > millis()) {
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return false;
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}
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accumulator = 0;
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// First real byte is a frame
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currentBit = 0;
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lastZero = 0;
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bitPosition = 0;
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bitClock = 0;
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preamble = 23; // 6.7ms each, 23 = 153ms
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done = false;
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hdlc = true;
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packet = 0x0; // No initial packet, find in the ISR
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currentBytePos = 0;
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maxTx = 3;
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sending = true;
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return true;
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}
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void AFSK::Encoder::stop() {
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randomWait = 0;
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sending = false;
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done = true;
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OCR2B = 0;
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}
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AFSK::Decoder::Decoder() {
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// Initialize the sampler delay line (phase shift)
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for(unsigned char i = 0; i < SAMPLEPERBIT/2; i++)
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delay_fifo.enqueue(0);
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}
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bool AFSK::HDLCDecode::hdlcParse(bool bit, SimpleFIFO<uint8_t,HAMSHIELD_AFSK_RX_FIFO_LEN> *fifo) {
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bool ret = true;
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demod_bits <<= 1;
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demod_bits |= bit ? 1 : 0;
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// Flag
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if(demod_bits == HDLC_FRAME) {
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fifo->enqueue(HDLC_FRAME);
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rxstart = true;
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currchar = 0;
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bit_idx = 0;
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return ret;
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}
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// Reset
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if((demod_bits & HDLC_RESET) == HDLC_RESET) {
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rxstart = false;
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lastRx = millis();
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return ret;
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}
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if(!rxstart) {
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return ret;
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}
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// Stuffed?
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if((demod_bits & 0x3f) == 0x3e)
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return ret;
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if(demod_bits & 0x01)
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currchar |= 0x80;
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if(++bit_idx >= 8) {
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if(currchar == HDLC_FRAME ||
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currchar == HDLC_RESET ||
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currchar == HDLC_ESCAPE) {
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fifo->enqueue(HDLC_ESCAPE);
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}
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fifo->enqueue(currchar & 0xff);
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currchar = 0;
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bit_idx = 0;
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} else {
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currchar >>= 1;
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}
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return ret;
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}
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// Handle the A/D converter interrupt (hopefully quickly :)
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void AFSK::Decoder::process(int8_t curr_sample) {
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// Run the same through the phase multiplier and butterworth filter
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iir_x[0] = iir_x[1];
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iir_x[1] = ((int8_t)delay_fifo.dequeue() * curr_sample) >> 2;
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iir_y[0] = iir_y[1];
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iir_y[1] = iir_x[0] + iir_x[1] + (iir_y[0] >> 1) + (iir_y[0]>>3) + (iir_y[0]>>5);
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// Shift the bit into place based on the output of the discriminator
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sampled_bits <<= 1;
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sampled_bits |= (iir_y[1] > 0) ? 1 : 0;
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// Place this ADC sample into the delay line
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delay_fifo.enqueue(curr_sample);
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// If we found a 0/1 transition, adjust phases to track
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if(EDGE_FOUND(sampled_bits)) {
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if(curr_phase < PHASE_THRES)
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curr_phase += PHASE_INC;
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else
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curr_phase -= PHASE_INC;
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}
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// Move ahead in phase
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curr_phase += PHASE_BIT;
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// If we've gone over the phase maximum, we should now have some data
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if(curr_phase >= PHASE_MAX) {
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curr_phase %= PHASE_MAX;
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found_bits <<= 1;
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// If we have 3 bits or more set, it's a positive bit
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register uint8_t bits = sampled_bits & 0x07;
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if(bits == 0x07 || bits == 0x06 || bits == 0x05 || bits == 0x03) {
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found_bits |= 1;
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}
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hdlc.hdlcParse(!EDGE_FOUND(found_bits), &rx_fifo); // Process it
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}
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}
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// This routine uses a pre-allocated Packet structure
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// to save on the memory requirements of the stream data
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bool AFSK::Decoder::read() {
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bool retVal = false;
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if(!currentPacket) { // We failed a prior memory allocation
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currentPacket = pBuf.makePacket(PACKET_MAX_LEN);
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if(!currentPacket) // Still nothing
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return false;
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}
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// While we have AFSK receive FIFO bytes...
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while(rx_fifo.count()) {
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// Grab the character
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char c = rx_fifo.dequeue();
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bool escaped = false;
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if(c == HDLC_ESCAPE) { // We received an escaped byte, mark it
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escaped = true;
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currentPacket->append(HDLC_ESCAPE); // Append without FCS
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c = rx_fifo.dequeue(); // Reset to the next character
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}
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// Append all the bytes
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// This will include unescaped HDLC_FRAME bytes
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//if(c == HDLC_FRAME && !escaped)
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//currentPacket->append(c); // Framing bytes don't get FCS updates
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//else
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if(c != HDLC_FRAME)
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currentPacket->appendFCS(c); // Escaped characters and all else go into FCS
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if(currentPacket->len > PACKET_MAX_LEN) {
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// We've now gone too far and picked up far too many bytes
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// Cancel this frame, start back at the beginning
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currentPacket->clear();
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continue;
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}
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// We have a frame boundary, if it isn't escaped
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// If it's escaped, it was part of the data stream
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if(c == HDLC_FRAME && !escaped) {
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if(!currentPacket->len) {
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currentPacket->clear(); // There wasn't any data, restart stream
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continue;
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} else {
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// We have some bytes in stream, check it meets minimum payload length
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// Min payload is 1 (flag) + 14 (addressing) + 2 (control/PID) + 1 (flag)
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if(currentPacket->len >= 16) {
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// We should end up here with a valid FCS due to the appendFCS
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if(currentPacket->crcOK()) { // Magic number for the CRC check passing
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// Valid frame, so, let's filter for control + PID
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// Maximum search distance is 71 bytes to end of the address fields
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// Skip the HDLC frame start
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bool filtered = false;
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for(unsigned char i = 0; i < (currentPacket->len<70?currentPacket->len:71); ++i) {
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if((currentPacket->getByte() & 0x1) == 0x1) { // Found a byte with LSB set
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// which marks the final address payload
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// next two bytes should be the control/PID
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if(currentPacket->getByte() == 0x03 && currentPacket->getByte() == 0xf0) {
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filtered = true;
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break; // Found it
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}
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}
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}
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if(!filtered) {
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// Frame wasn't one we care about, discard
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currentPacket->clear();
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continue;
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}
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// It's all done and formatted, ready to go
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currentPacket->ready = 1;
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if(!pBuf.putPacket(currentPacket)) // Put it in the receive FIFO
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pBuf.freePacket(currentPacket); // Out of FIFO space, so toss it
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// Allocate a new one of maximum length
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currentPacket = pBuf.makePacket(PACKET_MAX_LEN);
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retVal = true;
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}
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}
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}
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// Restart the stream
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currentPacket->clear();
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}
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}
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return retVal; // This is true if we parsed a packet in this flow
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}
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void AFSK::Decoder::start() {
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// Do this in start to allocate our first packet
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currentPacket = pBuf.makePacket(PACKET_MAX_LEN);
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// Configure the ADC and Timer1 to trigger automatic interrupts
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TCCR1A = 0;
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TCCR1B = _BV(CS11) | _BV(WGM13) | _BV(WGM12);
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ICR1 = ((F_CPU / 8) / REFCLK) - 1;
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ADMUX = _BV(REFS0) | _BV(ADLAR) | 0; // Channel 0, shift result left (ADCH used)
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DDRC &= ~_BV(0);
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PORTC &= ~_BV(0);
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DIDR0 |= _BV(0);
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ADCSRB = _BV(ADTS2) | _BV(ADTS1) | _BV(ADTS0);
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ADCSRA = _BV(ADEN) | _BV(ADSC) | _BV(ADATE) | _BV(ADIE) | _BV(ADPS2); // | _BV(ADPS0);
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}
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AFSK::PacketBuffer::PacketBuffer() {
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nextPacketIn = 0;
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nextPacketOut = 0;
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inBuffer = 0;
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for(unsigned char i = 0; i < PACKET_BUFFER_SIZE; ++i) {
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packets[i] = 0x0;
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}
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}
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unsigned char AFSK::PacketBuffer::readyCount() volatile {
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unsigned char i;
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unsigned int cnt = 0;
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ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
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for(i = 0; i < PACKET_BUFFER_SIZE; ++i) {
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if(packets[i] && packets[i]->ready)
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++cnt;
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}
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}
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return cnt;
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}
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// Return NULL on empty packet buffers
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AFSK::Packet *AFSK::PacketBuffer::getPacket() volatile {
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unsigned char i = 0;
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AFSK::Packet *p = NULL;
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ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
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if(inBuffer == 0) {
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return 0x0;
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}
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do {
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p = packets[nextPacketOut];
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if(p) {
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packets[nextPacketOut] = 0x0;
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--inBuffer;
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}
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nextPacketOut = ++nextPacketOut % PACKET_BUFFER_SIZE;
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++i;
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} while(!p && i<PACKET_BUFFER_SIZE);
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// Return whatever we found, if anything
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}
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return p;
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}
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//void Packet::init(uint8_t *buf, unsigned int dlen, bool freeData) {
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void AFSK::Packet::init(unsigned short dlen) {
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//data = (unsigned char *)buf;
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ready = 0;
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freeData = 1; //freeData;
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type = PACKET_STATIC;
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len = 0; // We had a length, but don't put it here.
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maxLen = dlen; // Put it here instead
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dataPtr = (uint8_t *)malloc(dlen+16);
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dataPos = dataPtr;
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readPos = dataPtr;
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fcs = 0xffff;
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}
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// Allocate a new packet with a data buffer as set
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AFSK::Packet *AFSK::PacketBuffer::makePacket(unsigned short dlen) {
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AFSK::Packet *p;
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ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
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//Packet *p = findPooledPacket();
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p = new Packet(); //(Packet *)malloc(sizeof(Packet));
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if(p) // If allocated
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p->init(dlen);
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}
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return p; // Passes through a null on failure.
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}
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// Free a packet struct, mainly convenience
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void AFSK::PacketBuffer::freePacket(Packet *p) {
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if(!p)
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return;
|
||||
ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
|
||||
p->free();
|
||||
/*unsigned char i;
|
||||
for(i = 0; i < PPOOL_SIZE; ++i)
|
||||
if(p == &(pPool[i]))
|
||||
break;
|
||||
if(i < PPOOL_SIZE)
|
||||
pStatus &= ~(1<<i);*/
|
||||
delete p;
|
||||
}
|
||||
}
|
||||
|
||||
// Put a packet onto the buffer array
|
||||
bool AFSK::PacketBuffer::putPacket(Packet *p) volatile {
|
||||
ATOMIC_BLOCK(ATOMIC_RESTORESTATE) {
|
||||
if(inBuffer >= PACKET_BUFFER_SIZE) {
|
||||
return false;
|
||||
}
|
||||
packets[nextPacketIn] = p;
|
||||
nextPacketIn = ++nextPacketIn % PACKET_BUFFER_SIZE;
|
||||
++inBuffer;
|
||||
}
|
||||
return true;
|
||||
}
|
||||
|
||||
// Print a single byte to the data array
|
||||
size_t AFSK::Packet::write(uint8_t c) {
|
||||
return (appendFCS(c)?1:0);
|
||||
}
|
||||
|
||||
size_t AFSK::Packet::write(const uint8_t *ptr, size_t len) {
|
||||
size_t i;
|
||||
for(i = 0; i < len; ++i)
|
||||
if(!appendFCS(ptr[i]))
|
||||
break;
|
||||
return i;
|
||||
}
|
||||
|
||||
// Determine what we want to do on this ADC tick.
|
||||
void AFSK::timer() {
|
||||
if(encoder.isSending())
|
||||
encoder.process();
|
||||
decoder.process(ADCH - 128);
|
||||
}
|
||||
|
||||
void AFSK::start() {
|
||||
afskEnabled = true;
|
||||
decoder.start();
|
||||
}
|
||||
|
|
@ -0,0 +1,265 @@
|
|||
#ifndef _AFSK_H_
|
||||
#define _AFSK_H_
|
||||
|
||||
#include <Arduino.h>
|
||||
#include <SimpleFIFO.h>
|
||||
|
||||
#define SAMPLERATE 9600
|
||||
#define BITRATE 1200
|
||||
|
||||
#define SAMPLEPERBIT (SAMPLERATE / BITRATE)
|
||||
|
||||
#define RX_FIFO_LEN 16
|
||||
|
||||
#define PACKET_BUFFER_SIZE 2
|
||||
#define PACKET_STATIC 0
|
||||
|
||||
// This is with all the digis, two addresses, framing and full payload
|
||||
// Two more bytes are added for HDLC_ESCAPEs
|
||||
#define PACKET_MAX_LEN 512
|
||||
|
||||
// HDLC framing bits
|
||||
#define HDLC_FRAME 0x7E
|
||||
#define HDLC_RESET 0x7F
|
||||
#define HDLC_PREAMBLE 0x00
|
||||
#define HDLC_ESCAPE 0x1B
|
||||
#define HDLC_TAIL 0x1C
|
||||
|
||||
class AFSK {
|
||||
private:
|
||||
volatile bool afskEnabled;
|
||||
public:
|
||||
bool enabled() { return afskEnabled; };
|
||||
|
||||
class Packet:public Print {
|
||||
public:
|
||||
Packet():Print() {};
|
||||
virtual size_t write(uint8_t);
|
||||
// Stock virtual method does what we want here.
|
||||
//virtual size_t write(const char *);
|
||||
virtual size_t write(const uint8_t *, size_t);
|
||||
using Print::write;
|
||||
unsigned char ready : 1;
|
||||
unsigned char type : 2;
|
||||
unsigned char freeData : 1;
|
||||
unsigned short len;
|
||||
unsigned short maxLen;
|
||||
//void init(uint8_t *buf, unsigned int dlen, bool freeData);
|
||||
void init(unsigned short dlen);
|
||||
inline void free() {
|
||||
if(freeData)
|
||||
::free(dataPtr);
|
||||
}
|
||||
inline const unsigned char getByte(void) {
|
||||
return *readPos++;
|
||||
}
|
||||
inline const unsigned char getByte(uint16_t p) {
|
||||
return *(dataPtr+p);
|
||||
}
|
||||
inline void start() {
|
||||
fcs = 0xffff;
|
||||
*dataPos++ = HDLC_ESCAPE;
|
||||
*dataPos++ = HDLC_FRAME;
|
||||
len = 2;
|
||||
}
|
||||
|
||||
inline bool append(char c) {
|
||||
if(len < maxLen) {
|
||||
++len;
|
||||
*dataPos++ = c;
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
#define UPDATE_FCS(d) e=fcs^(d); f=e^(e<<4); fcs=(fcs>>8)^(f<<8)^(f<<3)^(f>>4)
|
||||
//#define UPDATE_FCS(d) s=(d)^(fcs>>8); t=s^(s>>4); fcs=(fcs<<8)^t^(t<<5)^(t<<12)
|
||||
inline bool appendFCS(unsigned char c) {
|
||||
register unsigned char e, f;
|
||||
if(len < maxLen - 4) { // Leave room for FCS/HDLC
|
||||
append(c);
|
||||
UPDATE_FCS(c);
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
}
|
||||
|
||||
inline void finish() {
|
||||
append(~(fcs & 0xff));
|
||||
append(~((fcs>>8) & 0xff));
|
||||
append(HDLC_ESCAPE);
|
||||
append(HDLC_FRAME);
|
||||
ready = 1;
|
||||
}
|
||||
|
||||
inline void clear() {
|
||||
fcs = 0xffff;
|
||||
len = 0;
|
||||
readPos = dataPtr;
|
||||
dataPos = dataPtr;
|
||||
}
|
||||
|
||||
inline bool crcOK() {
|
||||
return (fcs == 0xF0B8);
|
||||
}
|
||||
private:
|
||||
uint8_t *dataPtr, *dataPos, *readPos;
|
||||
unsigned short fcs;
|
||||
};
|
||||
|
||||
|
||||
class PacketBuffer {
|
||||
public:
|
||||
// Initialize the buffers
|
||||
PacketBuffer();
|
||||
// How many packets are in the buffer?
|
||||
unsigned char count() volatile { return inBuffer; };
|
||||
// And how many of those are ready?
|
||||
unsigned char readyCount() volatile;
|
||||
// Retrieve the next packet
|
||||
Packet *getPacket() volatile;
|
||||
// Create a packet structure as needed
|
||||
// This does not place it in the queue
|
||||
static Packet *makePacket(unsigned short);
|
||||
// Conveniently free packet memory
|
||||
static void freePacket(Packet *);
|
||||
// Place a packet into the buffer
|
||||
bool putPacket(Packet *) volatile;
|
||||
private:
|
||||
volatile unsigned char inBuffer;
|
||||
Packet * volatile packets[PACKET_BUFFER_SIZE];
|
||||
volatile unsigned char nextPacketIn;
|
||||
volatile unsigned char nextPacketOut;
|
||||
};
|
||||
|
||||
class Encoder {
|
||||
public:
|
||||
Encoder() {
|
||||
randomWait = 1000; // At the very begin, wait at least one second
|
||||
sending = false;
|
||||
done = true;
|
||||
packet = 0x0;
|
||||
currentBytePos = 0;
|
||||
}
|
||||
void setFreq(unsigned long, byte);
|
||||
volatile inline bool isSending() volatile {
|
||||
return sending;
|
||||
}
|
||||
volatile inline bool isDone() volatile {
|
||||
return done;
|
||||
}
|
||||
volatile inline bool hasPackets() volatile {
|
||||
return (pBuf.count() > 0);
|
||||
}
|
||||
inline bool putPacket(Packet *packet) {
|
||||
return pBuf.putPacket(packet);
|
||||
}
|
||||
inline void setRandomWait() {
|
||||
randomWait = 250 + (rand() % 1000) + millis();
|
||||
}
|
||||
bool start();
|
||||
void stop();
|
||||
void process();
|
||||
private:
|
||||
volatile bool sending;
|
||||
byte currentByte;
|
||||
byte currentBit : 1;
|
||||
byte currentTone : 1;
|
||||
byte lastZero : 3;
|
||||
byte bitPosition : 3;
|
||||
byte preamble : 6;
|
||||
byte bitClock;
|
||||
bool hdlc;
|
||||
byte maxTx;
|
||||
Packet *packet;
|
||||
PacketBuffer pBuf;
|
||||
unsigned char currentBytePos;
|
||||
volatile unsigned long randomWait;
|
||||
volatile bool done;
|
||||
// Phase accumulator, 32 bits, we'll use ACCUMULATOR_BITS of it
|
||||
unsigned long accumulator;
|
||||
// Current radian step for the accumulator
|
||||
unsigned long rStep;
|
||||
};
|
||||
|
||||
class HDLCDecode {
|
||||
public:
|
||||
bool hdlcParse(bool, SimpleFIFO<uint8_t,RX_FIFO_LEN> *fifo);
|
||||
volatile bool rxstart;
|
||||
private:
|
||||
uint8_t demod_bits;
|
||||
uint8_t bit_idx;
|
||||
uint8_t currchar;
|
||||
};
|
||||
|
||||
class Decoder {
|
||||
public:
|
||||
Decoder();
|
||||
void start();
|
||||
bool read();
|
||||
void process(int8_t);
|
||||
inline bool dataAvailable() {
|
||||
return (rx_fifo.count() > 0);
|
||||
}
|
||||
inline uint8_t getByte() {
|
||||
return rx_fifo.dequeue();
|
||||
}
|
||||
inline uint8_t packetCount() volatile {
|
||||
return pBuf.count();
|
||||
}
|
||||
inline Packet *getPacket() {
|
||||
return pBuf.getPacket();
|
||||
}
|
||||
inline bool isReceiving() volatile {
|
||||
return hdlc.rxstart;
|
||||
}
|
||||
private:
|
||||
Packet *currentPacket;
|
||||
SimpleFIFO<int8_t,SAMPLEPERBIT/2+1> delay_fifo;
|
||||
SimpleFIFO<uint8_t,RX_FIFO_LEN> rx_fifo; // This should be drained fairly often
|
||||
int16_t iir_x[2];
|
||||
int16_t iir_y[2];
|
||||
uint8_t sampled_bits;
|
||||
int8_t curr_phase;
|
||||
uint8_t found_bits;
|
||||
PacketBuffer pBuf;
|
||||
HDLCDecode hdlc;
|
||||
};
|
||||
|
||||
public:
|
||||
inline bool read() {
|
||||
return decoder.read();
|
||||
}
|
||||
inline bool txReady() volatile {
|
||||
if(encoder.isDone() && encoder.hasPackets())
|
||||
return true;
|
||||
return false;
|
||||
}
|
||||
inline bool isDone() volatile { return encoder.isDone(); }
|
||||
inline bool txStart() {
|
||||
if(decoder.isReceiving()) {
|
||||
encoder.setRandomWait();
|
||||
return false;
|
||||
}
|
||||
return encoder.start();
|
||||
}
|
||||
inline bool putTXPacket(Packet *packet) {
|
||||
bool ret = encoder.putPacket(packet);
|
||||
if(!ret) // No room?
|
||||
PacketBuffer::freePacket(packet);
|
||||
return ret;
|
||||
}
|
||||
inline Packet *getRXPacket() {
|
||||
return decoder.getPacket();
|
||||
}
|
||||
inline uint8_t rxPacketCount() volatile {
|
||||
return decoder.packetCount();
|
||||
}
|
||||
//unsigned long lastTx;
|
||||
//unsigned long lastRx;
|
||||
void start();
|
||||
void timer();
|
||||
Encoder encoder;
|
||||
Decoder decoder;
|
||||
};
|
||||
#endif /* _AFSK_H_ */
|
||||
|
|
@ -1352,3 +1352,13 @@ void HamShield::AFSKOut(char buffer[80]) {
|
|||
|
||||
}
|
||||
*/
|
||||
|
||||
// This is the ADC timer handler. When enabled, we'll see what we're supposed
|
||||
// to be reading/handling, and trigger those on the main object.
|
||||
ISR(ADC_vect) {
|
||||
TIFR1 = _BV(ICF1); // Clear the timer flag
|
||||
|
||||
if(HamShield::sHamShield->afsk.enabled()) {
|
||||
HamShield::sHamShield->afsk.timer();
|
||||
}
|
||||
}
|
||||
|
|
|
|||
18
HamShield.h
18
HamShield.h
|
|
@ -9,6 +9,8 @@
|
|||
#define _HAMSHIELD_H_
|
||||
|
||||
#include "I2Cdev_rda.h"
|
||||
#include "SimpleFIFO.h"
|
||||
#include "AFSK.h"
|
||||
#include <avr/pgmspace.h>
|
||||
|
||||
// HamShield constants
|
||||
|
|
@ -19,6 +21,8 @@
|
|||
#define HAMSHIELD_PWM_PIN 11 // Pin assignment for PWM output
|
||||
#define HAMSHIELD_EMPTY_CHANNEL_RSSI -110 // Default threshold where channel is considered "clear"
|
||||
|
||||
#define HAMSHIELD_AFSK_RX_FIFO_LEN 16
|
||||
|
||||
// button modes
|
||||
#define PTT_MODE 1
|
||||
#define RESET_MODE 2
|
||||
|
|
@ -531,7 +535,14 @@ class HamShield {
|
|||
bool parityCalc(int code);
|
||||
// void AFSKOut(char buffer[80]);
|
||||
|
||||
|
||||
// AFSK routines
|
||||
bool AFSKStart();
|
||||
bool AFSKEnabled() { return afsk.enabled(); }
|
||||
bool AFSKStop();
|
||||
bool AFSKOut(const char *);
|
||||
|
||||
class AFSK afsk;
|
||||
|
||||
private:
|
||||
uint8_t devAddr;
|
||||
uint16_t radio_i2c_buf[4];
|
||||
|
|
@ -542,9 +553,10 @@ class HamShield {
|
|||
uint32_t MURS[];
|
||||
uint32_t WX[];
|
||||
|
||||
public:
|
||||
// public singleton for ISRs to reference
|
||||
public:
|
||||
static HamShield *sHamShield; // HamShield singleton, used for ISRs mostly
|
||||
|
||||
|
||||
// int8_t A1846S::readWord(uint8_t devAddr, uint8_t regAddr, uint16_t *data, uint16_t timeout);
|
||||
// int8_t A1846S::readBits(uint8_t devAddr, uint8_t regAddr, uint8_t bitStart, uint8_t length, uint16_t *data, uint16_t timeout);
|
||||
// int8_t A1846S::readBit(uint8_t devAddr, uint8_t regAddr, uint8_t bitNum, uint16_t *data, uint16_t timeout);
|
||||
|
|
|
|||
|
|
@ -0,0 +1,89 @@
|
|||
#ifndef SimpleFIFO_h
|
||||
#define SimpleFIFO_h
|
||||
/*
|
||||
||
|
||||
|| @file SimpleFIFO.h
|
||||
|| @version 1.2
|
||||
|| @author Alexander Brevig
|
||||
|| @contact alexanderbrevig@gmail.com
|
||||
||
|
||||
|| @description
|
||||
|| | A simple FIFO class, mostly for primitive types but can be used with classes if assignment to int is allowed
|
||||
|| | This FIFO is not dynamic, so be sure to choose an appropriate size for it
|
||||
|| #
|
||||
||
|
||||
|| @license
|
||||
|| | Copyright (c) 2010 Alexander Brevig
|
||||
|| | This library is free software; you can redistribute it and/or
|
||||
|| | modify it under the terms of the GNU Lesser General Public
|
||||
|| | License as published by the Free Software Foundation; version
|
||||
|| | 2.1 of the License.
|
||||
|| |
|
||||
|| | This library is distributed in the hope that it will be useful,
|
||||
|| | but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
|| | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||
|| | Lesser General Public License for more details.
|
||||
|| |
|
||||
|| | You should have received a copy of the GNU Lesser General Public
|
||||
|| | License along with this library; if not, write to the Free Software
|
||||
|| | Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
|| #
|
||||
||
|
||||
*/
|
||||
template<typename T, int rawSize>
|
||||
class SimpleFIFO {
|
||||
public:
|
||||
const int size; //speculative feature, in case it's needed
|
||||
|
||||
SimpleFIFO();
|
||||
|
||||
T dequeue(); //get next element
|
||||
bool enqueue( T element ); //add an element
|
||||
T peek() const; //get the next element without releasing it from the FIFO
|
||||
void flush(); //[1.1] reset to default state
|
||||
|
||||
//how many elements are currently in the FIFO?
|
||||
unsigned char count() { return numberOfElements; }
|
||||
|
||||
private:
|
||||
#ifndef SimpleFIFO_NONVOLATILE
|
||||
volatile unsigned char numberOfElements;
|
||||
volatile unsigned char nextIn;
|
||||
volatile unsigned char nextOut;
|
||||
volatile T raw[rawSize];
|
||||
#else
|
||||
unsigned char numberOfElements;
|
||||
unsigned char nextIn;
|
||||
unsigned char nextOut;
|
||||
T raw[rawSize];
|
||||
#endif
|
||||
};
|
||||
|
||||
template<typename T, int rawSize>
|
||||
SimpleFIFO<T,rawSize>::SimpleFIFO() : size(rawSize) {
|
||||
flush();
|
||||
}
|
||||
template<typename T, int rawSize>
|
||||
bool SimpleFIFO<T,rawSize>::enqueue( T element ) {
|
||||
if ( count() >= rawSize ) { return false; }
|
||||
numberOfElements++;
|
||||
nextIn %= size;
|
||||
raw[nextIn] = element;
|
||||
nextIn++; //advance to next index
|
||||
return true;
|
||||
}
|
||||
template<typename T, int rawSize>
|
||||
T SimpleFIFO<T,rawSize>::dequeue() {
|
||||
numberOfElements--;
|
||||
nextOut %= size;
|
||||
return raw[ nextOut++];
|
||||
}
|
||||
template<typename T, int rawSize>
|
||||
T SimpleFIFO<T,rawSize>::peek() const {
|
||||
return raw[ nextOut % size];
|
||||
}
|
||||
template<typename T, int rawSize>
|
||||
void SimpleFIFO<T,rawSize>::flush() {
|
||||
nextIn = nextOut = numberOfElements = 0;
|
||||
}
|
||||
#endif
|
||||
Loading…
Reference in New Issue