update ctcss/cdcss and morse

This commit is contained in:
Morgan Redfield 2018-08-09 20:32:29 -07:00
parent 38f5a467ef
commit c2a58487d3
2 changed files with 176 additions and 163 deletions

View File

@ -31,6 +31,7 @@ unsigned int morse_dot_millis = 100;
/* morse code lookup table */ /* morse code lookup table */
// This is the Morse table in reverse binary format. // This is the Morse table in reverse binary format.
// It will occupy 108 bytes of memory (or program memory if defined) // It will occupy 108 bytes of memory (or program memory if defined)
#define MORSE_TABLE_LENGTH 54 #define MORSE_TABLE_LENGTH 54
#define MORSE_TABLE_PROGMEM #define MORSE_TABLE_PROGMEM
#ifndef MORSE_TABLE_PROGMEM #ifndef MORSE_TABLE_PROGMEM
@ -681,155 +682,124 @@ uint16_t HamShield::getPABiasVoltage(){
// Subaudio settings // Subaudio settings
// recommended function for placing CTCSS tone on channel
// ctcss freq encoder
void HamShield::setCtcssEncoder(float freq) {
int dfreq = freq * 100; // Convert float into whole number (ctcss freq * 100)
setCtcssFreq(dfreq); // program CTCSS frequency buffer
HSwriteBitW(devAddr, A1846S_CTCSS_FREQ_PRG, 10, 1); // program CTCSS frequency buffer into CTCSS encoder (step 1)
HSwriteBitW(devAddr, A1846S_CTCSS_FREQ_PRG, 9, 1); // program CTCSS frequency buffer into CTCSS encoder (step 2)
}
// recommended function for detecting (and requiring) CTCSS to be on channel before audio is unmuted -- schedule remainder for deprecation
// ctcss freq decoder
void HamShield::setCtcssDecoder(float freq) {
int dfreq = freq * 100; // Convert float into whole number (ctcss freq * 100)
setCtcssFreq(dfreq); // program CTCSS frequency buffer
HSwriteBitW(devAddr, A1846S_CTCSS_FREQ_PRG, 10, 1); // program CTCSS frequency buffer into CTCSS encoder (step 1)
HSwriteBitW(devAddr, A1846S_CTCSS_FREQ_PRG, 9, 1); // program CTCSS frequency buffer into CTCSS encoder (step 2)
}
// TX and RX code // TX and RX code
/*
Set code mode:
Step1: set 58H[1:0]=11 set voice hpf bypass
Step2: set 58H[5:3]=111 set voice lpf bypass and pre/de-emph bypass
Step3 set 3CH[15:14]=10 set code mode
Step4: set 1FH[3:2]=01 set GPIO code in or code out
TX code mode:
Step1: 45H[2:0]=010
RX code mode:
Step1: set 45H[2:0]=001
Step2: set 4dH[15:10]=000001
*/
// Ctcss/cdcss mode sel // Ctcss/cdcss mode sel
// x00=disable, // 00000= disable,
// 001=inner ctcss en, // 00001= det ctcss tone 1
// 010= inner cdcss en // 00010= det cdcss
// 101= outer ctcss en, // 00100= det inverted ctcss
// 110=outer cdcss en // 01000= det ctcss tone 2 (unused in HS right now)
// others =disable // 10000= det phase shift
void HamShield::setCtcssCdcssMode(uint16_t mode){ void HamShield::setCtcssCdcssMode(uint16_t mode){
HSwriteBitsW(devAddr, A1846S_SUBAUDIO_REG, A1846S_C_MODE_BIT, A1846S_C_MODE_LENGTH, mode); HSwriteBitsW(devAddr, A1846S_TX_VOICE_REG, A1846S_CTDCSS_DTEN_BIT, A1846S_CTDCSS_DTEN_LEN, mode);
} }
uint16_t HamShield::getCtcssCdcssMode(){ uint16_t HamShield::getCtcssCdcssMode(){
HSreadBitsW(devAddr, A1846S_SUBAUDIO_REG, A1846S_C_MODE_BIT, A1846S_C_MODE_LENGTH, radio_i2c_buf); HSreadBitsW(devAddr, A1846S_TX_VOICE_REG, A1846S_CTDCSS_DTEN_BIT, A1846S_CTDCSS_DTEN_BIT, radio_i2c_buf);
return radio_i2c_buf[0]; return radio_i2c_buf[0];
} }
void HamShield::setInnerCtcssMode(){
setCtcssCdcssMode(1); void HamShield::setDetPhaseShift() {
setCtcssCdcssMode(0x10);
} }
void HamShield::setInnerCdcssMode(){ void HamShield::setDetInvertCdcss() {
setCtcssCdcssMode(2); setCtcssCdcssMode(0x4);
} }
void HamShield::setOuterCtcssMode(){ void HamShield::setDetCdcss() {
setCtcssCdcssMode(5); setCtcssCdcssMode(0x2);
} }
void HamShield::setOuterCdcssMode(){ void HamShield::setDetCtcss() {
setCtcssCdcssMode(6); setCtcssCdcssMode(0x1);
} }
void HamShield::disableCtcssCdcss(){ void HamShield::disableCtcssCdcss(){
setCtcssCdcssMode(0); setCtcssCdcssMode(0);
} }
// Ctcss_sel // Ctcss_sel
// 1 = ctcss_cmp/cdcss_cmp out via gpio // 1 = ctcss_cmp/cdcss_cmp out via gpio
// 0 = ctcss/cdcss sdo out vio gpio // 0 = ctcss/cdcss sdo out via gpio
void HamShield::setCtcssSel(bool cmp_nsdo){ void HamShield::setCtcssGpioSel(bool cmp_nsdo){
HSwriteBitW(devAddr, A1846S_SUBAUDIO_REG, A1846S_CTCSS_SEL_BIT, cmp_nsdo); setGpioFcn(0);
} }
bool HamShield::getCtcssSel(){ bool HamShield::getCtcssGpioSel(){
HSreadBitW(devAddr, A1846S_SUBAUDIO_REG, A1846S_CTCSS_SEL_BIT, radio_i2c_buf); uint16_t mode = getGpioMode(0);
return (radio_i2c_buf[0] != 0); return (mode == 1);
} }
// Cdcss_sel // Cdcss_sel
// 1 = long (24 bit) code // 1 = long (24 bit) code
// 0 = short(23 bit) code // 0 = short(23 bit) code
void HamShield::setCdcssSel(bool long_nshort){ void HamShield::setCdcssSel(bool long_nshort){
HSwriteBitW(devAddr, A1846S_SUBAUDIO_REG, A1846S_CDCSS_SEL_BIT, long_nshort); HSwriteBitW(devAddr, A1846S_CTCSS_MODE_REG, A1846S_CDCSS_SEL_BIT, long_nshort);
} }
bool HamShield::getCdcssSel(){ bool HamShield::getCdcssSel(){
HSreadBitW(devAddr, A1846S_SUBAUDIO_REG, A1846S_CDCSS_SEL_BIT, radio_i2c_buf); HSreadBitW(devAddr, A1846S_CTCSS_MODE_REG, A1846S_CDCSS_SEL_BIT, radio_i2c_buf);
return (radio_i2c_buf[0] != 0); return (radio_i2c_buf[0] == 1);
}
void HamShield::setCdcssInvert(bool invert) {
HSwriteBitW(devAddr, A1846S_CTCSS_MODE_REG, A1846S_CDCSS_INVERT_BIT, invert);
}
bool HamShield::getCdcssInvert() {
HSreadBitW(devAddr, A1846S_CTCSS_MODE_REG, A1846S_CDCSS_INVERT_BIT, radio_i2c_buf);
return (radio_i2c_buf[0] == 1);
} }
// Cdcss neg_det_en // Cdcss neg_det_en
void HamShield::enableCdcssNegDet(){
HSwriteBitW(devAddr, A1846S_SUBAUDIO_REG, A1846S_NEG_DET_EN_BIT, 1);
}
void HamShield::disableCdcssNegDet(){
HSwriteBitW(devAddr, A1846S_SUBAUDIO_REG, A1846S_NEG_DET_EN_BIT, 0);
}
bool HamShield::getCdcssNegDetEnabled(){ bool HamShield::getCdcssNegDetEnabled(){
HSreadBitW(devAddr, A1846S_SUBAUDIO_REG, A1846S_NEG_DET_EN_BIT, radio_i2c_buf); uint16_t css_mode = getCtcssCdcssMode();
return (radio_i2c_buf[0] != 0); return (css_mode == 4);
} }
// Cdcss pos_det_en // Cdcss pos_det_en
void HamShield::enableCdcssPosDet(){
HSwriteBitW(devAddr, A1846S_SUBAUDIO_REG, A1846S_POS_DET_EN_BIT, 1);
}
void HamShield::disableCdcssPosDet(){
HSwriteBitW(devAddr, A1846S_SUBAUDIO_REG, A1846S_POS_DET_EN_BIT, 0);
}
bool HamShield::getCdcssPosDetEnabled(){ bool HamShield::getCdcssPosDetEnabled(){
HSreadBitW(devAddr, A1846S_SUBAUDIO_REG, A1846S_POS_DET_EN_BIT, radio_i2c_buf); uint16_t css_mode = getCtcssCdcssMode();
return (radio_i2c_buf[0] != 0); return (css_mode == 2);
} }
// css_det_en // css_det_en
void HamShield::enableCssDet(){ bool HamShield::getCtssDetEnabled(){
HSwriteBitW(devAddr, A1846S_SUBAUDIO_REG, A1846S_CSS_DET_EN_BIT, 1); uint16_t css_mode = getCtcssCdcssMode();
} return (css_mode == 1);
void HamShield::disableCssDet(){
HSwriteBitW(devAddr, A1846S_SUBAUDIO_REG, A1846S_CSS_DET_EN_BIT, 0);
}
bool HamShield::getCssDetEnabled(){
HSreadBitW(devAddr, A1846S_SUBAUDIO_REG, A1846S_CSS_DET_EN_BIT, radio_i2c_buf);
return (radio_i2c_buf[0] != 0);
} }
// ctcss freq // ctcss freq
void HamShield::setCtcss(float freq) { void HamShield::setCtcss(float freq_Hz) {
int dfreq = freq / 10000; setCtcssFreq((uint16_t) (freq_Hz*100));
dfreq = dfreq * 65536;
setCtcssFreq(dfreq);
} }
void HamShield::setCtcssFreq(uint16_t freq){ void HamShield::setCtcssFreq(uint16_t freq_milliHz){
HSwriteWord(devAddr, A1846S_CTCSS_FREQ_REG, freq); HSwriteWord(devAddr, A1846S_CTCSS_FREQ_REG, freq_milliHz);
} }
uint16_t HamShield::getCtcssFreq(){ uint16_t HamShield::getCtcssFreqMilliHz(){
HSreadWord(devAddr, A1846S_CTCSS_FREQ_REG, radio_i2c_buf); HSreadWord(devAddr, A1846S_CTCSS_FREQ_REG, radio_i2c_buf);
return radio_i2c_buf[0]; return radio_i2c_buf[0];
} }
float HamShield::getCtcssFreqHz() {
return ((float)(getCtcssFreqMilliHz()))/100;
}
void HamShield::setCtcssFreqToStandard(){ void HamShield::setCtcssFreqToStandard(){
// freq must be 134.4Hz for standard cdcss mode // freq must be 134.4Hz for standard cdcss mode
setCtcssFreq(0x2268); setCtcssFreq(13440);
} }
void HamShield::enableCtcss() {
// enable TX
HSwriteBitsW(devAddr, A1846S_CTCSS_MODE_REG, 10, 2, 3);
// enable RX
setCtcssGpioSel(1);
HSwriteBitW(devAddr, A1846S_TX_VOICE_REG, A1846S_CTCSS_DET_BIT, 0);
HSwriteBitW(devAddr, A1846S_EMPH_FILTER_REG, A1846S_CTCSS_FILTER_BYPASS, 0);
setDetCtcss();
}
void HamShield::disableCtcss() {
HSwriteBitsW(devAddr, A1846S_CTCSS_MODE_REG, 10, 2, 0);
disableCtcssCdcss();
}
// cdcss codes // cdcss codes
void HamShield::setCdcssCode(uint16_t code) { void HamShield::setCdcssCode(uint16_t code) {
@ -966,15 +936,15 @@ bool HamShield::getTailNoiseElimEnabled(){
// tail noise shift select // tail noise shift select
// Select ctcss phase shift when use tail eliminating function when TX // Select ctcss phase shift when use tail eliminating function when TX
// 00 = 120 degree shift // 00 = 0 degree shift
// 01 = 180 degree shift // 01 = 120 degree shift
// 10 = 240 degree shift // 10 = 180 degree shift
// 11 = reserved // 11 = 240 degree shift
void HamShield::setShiftSelect(uint16_t shift_sel){ void HamShield::setShiftSelect(uint16_t shift_sel){
HSwriteBitsW(devAddr, A1846S_SUBAUDIO_REG, A1846S_SHIFT_SEL_BIT, A1846S_SHIFT_SEL_LENGTH, shift_sel); HSwriteBitsW(devAddr, A1846S_CTCSS_MODE_REG, A1846S_SHIFT_SEL_BIT, A1846S_SHIFT_SEL_LEN, shift_sel);
} }
uint16_t HamShield::getShiftSelect(){ uint16_t HamShield::getShiftSelect(){
HSreadBitsW(devAddr, A1846S_SUBAUDIO_REG, A1846S_SHIFT_SEL_BIT, A1846S_SHIFT_SEL_LENGTH, radio_i2c_buf); HSreadBitsW(devAddr, A1846S_CTCSS_MODE_REG, A1846S_SHIFT_SEL_BIT, A1846S_SHIFT_SEL_LEN, radio_i2c_buf);
return radio_i2c_buf[0]; return radio_i2c_buf[0];
} }
@ -1087,6 +1057,37 @@ void HamShield::setDTMFCode(uint16_t code){
} }
// Tone detection
void HamShield::lookForTone(uint16_t t_hz) {
float tone_hz = (float) t_hz;
float Fs = 6400000/1024;
float k = floor(tone_hz/Fs*127 + 0.5);
uint16_t t = (uint16_t) (round(2.0*cos(2.0*PI*k/127)*1024));
float k2 = floor(2*tone_hz/Fs*127+0.5);
uint16_t h = (uint16_t) (round(2.0*cos(2.0*PI*k2/127)*1024));
// set tone
HSwriteWord(devAddr, 0x68, t);
// set second harmonic
HSwriteWord(devAddr, 0x70, h);
// turn on tone detect
HSwriteBitW(devAddr, A1846S_DTMF_ENABLE_REG, A1846S_TONE_DETECT, 1);
HSwriteBitW(devAddr, A1846S_DTMF_ENABLE_REG, A1846S_DTMF_ENABLE_BIT, 1);
}
uint8_t HamShield::toneDetected() {
HSreadBitsW(devAddr, A1846S_DTMF_CODE_REG, A1846S_DTMF_SAMPLE_BIT, 1, radio_i2c_buf);
if (radio_i2c_buf[0] != 0) {
HSreadBitsW(devAddr, A1846S_DTMF_CODE_REG, A1846S_DTMF_CODE_BIT, A1846S_DTMF_CODE_LEN, radio_i2c_buf);
if (radio_i2c_buf[0] == 1) {
return 1;
}
}
return 0;
}
// TX FM deviation // TX FM deviation
void HamShield::setFMVoiceCssDeviation(uint16_t deviation){ void HamShield::setFMVoiceCssDeviation(uint16_t deviation){
HSwriteBitsW(devAddr, A1846S_FM_DEV_REG, A1846S_FM_DEV_VOICE_BIT, A1846S_FM_DEV_VOICE_LENGTH, deviation); HSwriteBitsW(devAddr, A1846S_FM_DEV_REG, A1846S_FM_DEV_VOICE_BIT, A1846S_FM_DEV_VOICE_LENGTH, deviation);
@ -1592,6 +1593,21 @@ uint8_t HamShield::morseLookup(char letter) {
return 0; return 0;
} }
uint8_t HamShield::morseReverseLookup(uint8_t itu) {
uint8_t i;
for(i = 0; i < MORSE_TABLE_LENGTH; i++) {
#ifndef MORSE_TABLE_PROGMEM
if(asciiMorse[i].itu == itu)
return asciiMorse[i].ascii;
#else
uint16_t w = pgm_read_word_near(asciiMorseProgmem + i);
if( (uint8_t)(w & 0xff) == itu )
return (char)((w>>8) & 0xff);
#endif // MORSE_TABLE_PROGMEM
}
return 0;
}
/* /*
SSTV VIS Digital Header SSTV VIS Digital Header

View File

@ -30,6 +30,7 @@
#define A1846S_CLK_MODE_REG 0x04 // clk_mode #define A1846S_CLK_MODE_REG 0x04 // clk_mode
#define A1846S_PABIAS_REG 0x0A // control register for bias voltage #define A1846S_PABIAS_REG 0x0A // control register for bias voltage
//#define A1846S_BAND_SEL_REG 0x0F // band_sel register <1:0> //#define A1846S_BAND_SEL_REG 0x0F // band_sel register <1:0>
#define A1846S_FLAG_REG 0x1C
#define A1846S_GPIO_MODE_REG 0x1F // GPIO mode select register #define A1846S_GPIO_MODE_REG 0x1F // GPIO mode select register
#define A1846S_FREQ_HI_REG 0x29 // freq<29:16> #define A1846S_FREQ_HI_REG 0x29 // freq<29:16>
#define A1846S_FREQ_LO_REG 0x2A // freq<15:0> #define A1846S_FREQ_LO_REG 0x2A // freq<15:0>
@ -41,13 +42,12 @@
#define A1846S_TH_L_VOX_REG 0x42 // register holds vox low (shut) threshold bits #define A1846S_TH_L_VOX_REG 0x42 // register holds vox low (shut) threshold bits
#define A1846S_FM_DEV_REG 0x43 // register holds fm deviation settings #define A1846S_FM_DEV_REG 0x43 // register holds fm deviation settings
#define A1846S_RX_VOLUME_REG 0x44 // register holds RX volume settings #define A1846S_RX_VOLUME_REG 0x44 // register holds RX volume settings
#define A1846S_SUBAUDIO_REG 0x45 // sub audio register
#define A1846S_SQ_OPEN_THRESH_REG 0x48 // see sq #define A1846S_SQ_OPEN_THRESH_REG 0x48 // see sq
#define A1846S_SQ_SHUT_THRESH_REG 0x49 // see sq #define A1846S_SQ_SHUT_THRESH_REG 0x49 // see sq
#define A1846S_CTCSS_FREQ_REG 0x4A // ctcss_freq<15:0> #define A1846S_CTCSS_FREQ_REG 0x4A // ctcss_freq<15:0>
#define A1846S_CDCSS_CODE_HI_REG 0x4B // cdcss_code<23:16> #define A1846S_CDCSS_CODE_HI_REG 0x4B // cdcss_code<23:16>
#define A1846S_CDCSS_CODE_LO_REG 0x4C // cdccs_code<15:0> #define A1846S_CDCSS_CODE_LO_REG 0x4C // cdccs_code<15:0>
#define A1846S_CTCSS_FREQ_PRG 0x4e // copies CTCSS value from A1846S_CTCSS_FREQ_REG into CTCSS encoder #define A1846S_CTCSS_MODE_REG 0x4e // copies CTCSS value from A1846S_CTCSS_FREQ_REG into CTCSS encoder
#define A1846S_SQ_OUT_SEL_REG 0x54 // see sq #define A1846S_SQ_OUT_SEL_REG 0x54 // see sq
#define A1846S_EMPH_FILTER_REG 0x58 #define A1846S_EMPH_FILTER_REG 0x58
#define A1846S_FLAG_REG 0x5C // holds flags for different statuses #define A1846S_FLAG_REG 0x5C // holds flags for different statuses
@ -92,22 +92,22 @@
//#define A1846S_BAND_SEL_LENGTH 2 //#define A1846S_BAND_SEL_LENGTH 2
// Bitfields for A1846_GPIO_MODE_REG // Bitfields for A1846_GPIO_MODE_REG
#define RDA1864_GPIO7_MODE_BIT 15 // <1:0> 00=hi-z,01=vox,10=low,11=hi #define A1846S_GPIO7_MODE_BIT 15 // <1:0> 00=hi-z,01=vox,10=low,11=hi
#define RDA1864_GPIO7_MODE_LENGTH 2 #define A1846S_GPIO7_MODE_LENGTH 2
#define RDA1864_GPIO6_MODE_BIT 13 // <1:0> 00=hi-z,01=sq or =sq&ctcss/cdcss when sq_out_sel=1,10=low,11=hi #define A1846S_GPIO6_MODE_BIT 13 // <1:0> 00=hi-z,01=sq or =sq&ctcss/cdcss when sq_out_sel=1,10=low,11=hi
#define RDA1864_GPIO6_MODE_LENGTH 2 #define A1846S_GPIO6_MODE_LENGTH 2
#define RDA1864_GPIO5_MODE_BIT 11 // <1:0> 00=hi-z,01=txon_rf,10=low,11=hi #define A1846S_GPIO5_MODE_BIT 11 // <1:0> 00=hi-z,01=txon_rf,10=low,11=hi
#define RDA1864_GPIO5_MODE_LENGTH 2 #define A1846S_GPIO5_MODE_LENGTH 2
#define RDA1864_GPIO4_MODE_BIT 9 // <1:0> 00=hi-z,01=rxon_rf,10=low,11=hi #define A1846S_GPIO4_MODE_BIT 9 // <1:0> 00=hi-z,01=rxon_rf,10=low,11=hi
#define RDA1864_GPIO4_MODE_LENGTH 2 #define A1846S_GPIO4_MODE_LENGTH 2
#define RDA1864_GPIO3_MODE_BIT 7 // <1:0> 00=hi-z,01=sdo,10=low,11=hi #define A1846S_GPIO3_MODE_BIT 7 // <1:0> 00=hi-z,01=sdo,10=low,11=hi
#define RDA1864_GPIO3_MODE_LENGTH 2 #define A1846S_GPIO3_MODE_LENGTH 2
#define RDA1864_GPIO2_MODE_BIT 5 // <1:0> 00=hi-z,01=int,10=low,11=hi #define A1846S_GPIO2_MODE_BIT 5 // <1:0> 00=hi-z,01=int,10=low,11=hi
#define RDA1864_GPIO2_MODE_LENGTH 2 #define A1846S_GPIO2_MODE_LENGTH 2
#define RDA1864_GPIO1_MODE_BIT 3 // <1:0> 00=hi-z,01=code_out/code_in,10=low,11=hi #define A1846S_GPIO1_MODE_BIT 3 // <1:0> 00=hi-z,01=code_out/code_in,10=low,11=hi
#define RDA1864_GPIO1_MODE_LENGTH 2 #define A1846S_GPIO1_MODE_LENGTH 2
#define RDA1864_GPIO0_MODE_BIT 1 // <1:0> 00=hi-z,01=css_out/css_in/css_cmp,10=low,11=hi #define A1846S_GPIO0_MODE_BIT 1 // <1:0> 00=hi-z,01=css_out/css_in/css_cmp,10=low,11=hi
#define RDA1864_GPIO0_MODE_LENGTH 2 #define A1846S_GPIO0_MODE_LENGTH 2
// Bitfields for A1846S_INT_MODE_REG // Bitfields for A1846S_INT_MODE_REG
#define A1846S_CSS_CMP_INT_BIT 9 // css_cmp_uint16_t enable #define A1846S_CSS_CMP_INT_BIT 9 // css_cmp_uint16_t enable
@ -123,6 +123,7 @@
// Bitfields for A1846S_TX_VOICE_REG // Bitfields for A1846S_TX_VOICE_REG
#define A1846S_VOICE_SEL_BIT 14 //voice_sel<1:0> #define A1846S_VOICE_SEL_BIT 14 //voice_sel<1:0>
#define A1846S_VOICE_SEL_LENGTH 3 #define A1846S_VOICE_SEL_LENGTH 3
#define A1846S_CTCSS_DET_BIT 5
// Bitfields for A1846S_TH_H_VOX_REG // Bitfields for A1846S_TH_H_VOX_REG
#define A1846S_TH_H_VOX_BIT 14 // th_h_vox<14:0> #define A1846S_TH_H_VOX_BIT 14 // th_h_vox<14:0>
@ -140,16 +141,14 @@
#define A1846S_RX_VOL_2_BIT 3 // volume 2 <3:0>, (0000)-15dB~(1111)0dB, step 1dB #define A1846S_RX_VOL_2_BIT 3 // volume 2 <3:0>, (0000)-15dB~(1111)0dB, step 1dB
#define A1846S_RX_VOL_2_LENGTH 4 #define A1846S_RX_VOL_2_LENGTH 4
// Bitfields for A1846S_SUBAUDIO_REG Sub Audio Register // Bitfields for Sub Audio Bits
#define A1846S_SHIFT_SEL_BIT 15 // shift_sel<1:0> see eliminating tail noise #define A1846S_CTDCSS_OUT_SEL_BIT 5
#define A1846S_SHIFT_SEL_LENGTH 2 #define A1846S_CTDCSS_DTEN_BIT 4
#define A1846S_POS_DET_EN_BIT 11 // if 1, cdcss code will be detected #define A1846S_CTDCSS_DTEN_LEN 5
#define A1846S_CSS_DET_EN_BIT 10 // 1 - sq detect will add ctcss/cdcss detect result and control voice output on or off #define A1846S_CDCSS_SEL_BIT 6 // cdcss_sel
#define A1846S_NEG_DET_EN_BIT 7 // if 1, cdcss inverse code will be detected at same time #define A1846S_CDCSS_INVERT_BIT 6 // cdcss_sel
#define A1846S_CDCSS_SEL_BIT 4 // cdcss_sel #define A1846S_SHIFT_SEL_BIT 15
#define A1846S_CTCSS_SEL_BIT 3 // ctcss_sel #define A1846S_SHIFT_SEL_LEN 2
#define A1846S_C_MODE_BIT 2 // c_mode<2:0>
#define A1846S_C_MODE_LENGTH 3
// Bitfields for A1846S_SQ_THRESH_REG // Bitfields for A1846S_SQ_THRESH_REG
#define A1846S_SQ_OPEN_THRESH_BIT 9 // sq open threshold <9:0> #define A1846S_SQ_OPEN_THRESH_BIT 9 // sq open threshold <9:0>
@ -164,6 +163,7 @@
// Bitfields for A1846S_EMPH_FILTER_REG // Bitfields for A1846S_EMPH_FILTER_REG
#define A1846S_EMPH_FILTER_EN 7 #define A1846S_EMPH_FILTER_EN 7
#define A1846S_CTCSS_FILTER_BYPASS 3
// Bitfields for A1846S_FLAG_REG // Bitfields for A1846S_FLAG_REG
#define A1846S_RXON_RF_FLAG_BIT 10 // 1 when rxon is enabled #define A1846S_RXON_RF_FLAG_BIT 10 // 1 when rxon is enabled
@ -183,6 +183,7 @@
// Bitfields for A1846S_DTMF_ENABLE_REG // Bitfields for A1846S_DTMF_ENABLE_REG
#define A1846S_DTMF_ENABLE_BIT 15 #define A1846S_DTMF_ENABLE_BIT 15
#define A1846S_TONE_DETECT 14
#define A18462_DTMF_DET_TIME_BIT 7 #define A18462_DTMF_DET_TIME_BIT 7
#define A18462_DTMF_DET_TIME_LEN 8 #define A18462_DTMF_DET_TIME_LEN 8
@ -283,15 +284,6 @@ class HamShield {
// Subaudio settings // Subaudio settings
// Recommended user function for setting and receiving CTCSS does
// TODO: set others to private and/or deprecate
void setCtcssEncoder(float freq); // generate sub audio tone on channel when transmitting
void setCtcssDecoder(float freq); // unmute audio on tone present when receiving channel
// Ctcss/cdcss mode sel // Ctcss/cdcss mode sel
// x00=disable, // x00=disable,
// 001=inner ctcss en, // 001=inner ctcss en,
@ -301,17 +293,29 @@ class HamShield {
// others =disable // others =disable
void setCtcssCdcssMode(uint16_t mode); void setCtcssCdcssMode(uint16_t mode);
uint16_t getCtcssCdcssMode(); uint16_t getCtcssCdcssMode();
void setInnerCtcssMode(); void setDetPhaseShift();
void setInnerCdcssMode(); void setDetInvertCdcss();
void setOuterCtcssMode(); void setDetCdcss();
void setOuterCdcssMode(); void setDetCtcss();
void disableCtcssCdcss(); void disableCtcssCdcss();
// ctcss freq
void setCtcss(float freq_Hz);
void setCtcssFreq(uint16_t freq_milliHz);
uint16_t getCtcssFreqMilliHz();
float getCtcssFreqHz();
void setCtcssFreqToStandard(); // freq must be 134.4Hz for standard cdcss mode
void enableCtcss();
void disableCtcss();
// Ctcss_sel // Ctcss_sel
// 1 = ctcss_cmp/cdcss_cmp out via gpio // 1 = ctcss_cmp/cdcss_cmp out via gpio
// 0 = ctcss/cdcss sdo out vio gpio // 0 = ctcss/cdcss sdo out vio gpio
void setCtcssSel(bool cmp_nsdo); void setCtcssGpioSel(bool cmp_nsdo);
bool getCtcssSel(); bool getCtcssGpioSel();
void setCdcssInvert(bool invert);
bool getCdcssInvert();
// Cdcss_sel // Cdcss_sel
// 1 = long (24 bit) code // 1 = long (24 bit) code
@ -319,30 +323,18 @@ class HamShield {
void setCdcssSel(bool long_nshort); void setCdcssSel(bool long_nshort);
bool getCdcssSel(); bool getCdcssSel();
// Cdcss neg_det_en // Cdcss neg_det_en
void enableCdcssNegDet();
void disableCdcssNegDet();
bool getCdcssNegDetEnabled(); bool getCdcssNegDetEnabled();
// Cdcss pos_det_en // Cdcss pos_det_en
void enableCdcssPosDet();
void disableCdcssPosDet();
bool getCdcssPosDetEnabled(); bool getCdcssPosDetEnabled();
// css_det_en // ctss_det_en
void enableCssDet(); bool getCtssDetEnabled();
void disableCssDet();
bool getCssDetEnabled();
// ctcss freq
void setCtcss(float freq);
void setCtcssFreq(uint16_t freq);
uint16_t getCtcssFreq();
void setCtcssFreqToStandard(); // freq must be 134.4Hz for standard cdcss mode
// cdcss codes // cdcss codes
void setCdcssCode(uint16_t code); void setCdcssCode(uint16_t code);
uint16_t getCdcssCode(); uint16_t getCdcssCode();
// SQ // SQ
void setSQOn(); void setSQOn();
void setSQOff(); void setSQOff();
@ -405,6 +397,10 @@ class HamShield {
uint16_t getDTMFCode(); uint16_t getDTMFCode();
uint16_t getDTMFTxActive(); uint16_t getDTMFTxActive();
void setDTMFCode(uint16_t code); void setDTMFCode(uint16_t code);
// Tone
void lookForTone(uint16_t tone_hz);
uint8_t toneDetected();
// TX FM deviation // TX FM deviation
@ -474,6 +470,7 @@ class HamShield {
void setMorseDotMillis(unsigned int morse_dot_dur_millis); void setMorseDotMillis(unsigned int morse_dot_dur_millis);
void morseOut(char buffer[HAMSHIELD_MORSE_BUFFER_SIZE]); void morseOut(char buffer[HAMSHIELD_MORSE_BUFFER_SIZE]);
uint8_t morseLookup(char letter); uint8_t morseLookup(char letter);
uint8_t morseReverseLookup(uint8_t itu);
bool waitForChannel(long timeout, long breakwindow, int setRSSI); bool waitForChannel(long timeout, long breakwindow, int setRSSI);
void SSTVVISCode(int code); void SSTVVISCode(int code);
void SSTVTestPattern(int code); void SSTVTestPattern(int code);