Very rough draft of DDS supporting the Arduio Zero and it's built-in DAC.
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Jake-B
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c679bec886
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fdaa602401
140
DDS.cpp
140
DDS.cpp
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@ -1,41 +1,95 @@
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#include <Arduino.h>
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#include "DDS.h"
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#ifdef __SAMD21G18A__
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// The SimpleAudioPlayerZero sample project found at:
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// https://www.arduino.cc/en/Tutorial/SimpleAudioPlayerZero
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// is an execellent reference for setting up the Timer/Counter
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#define TC_ISBUSY() (TC5->COUNT16.STATUS.reg & TC_STATUS_SYNCBUSY)
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#define TC_WAIT() while (TC_ISBUSY());
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#define TC_ENABLE() TC5->COUNT16.CTRLA.reg |= TC_CTRLA_ENABLE; TC_WAIT();
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#define TC_RESET() TC5->COUNT16.CTRLA.reg = TC_CTRLA_SWRST; TC_WAIT(); \
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while (TC5->COUNT16.CTRLA.bit.SWRST);
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#define TC_DISABLE() TC5->COUNT16.CTRLA.reg &= ~TC_CTRLA_ENABLE; TC_WAIT();
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#endif
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// To start the DDS, we use Timer1, set to the reference clock
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// We use Timer2 for the PWM output, running as fast as feasible
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void DDS::start() {
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#ifdef DDS_DEBUG_SERIAL
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// Print these debug statements (commont to both the AVR and the SAMD21)
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Serial.print(F("DDS SysClk: "));
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Serial.println(F_CPU/8);
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Serial.print(F("DDS RefClk: "));
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Serial.println(refclk, DEC);
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#endif
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#ifdef __SAMD21G18A__
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// Enable the Generic Clock Generator 0 and configure for TC4 and TC5.
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// We only need TC5, but they are configured together
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GCLK->CLKCTRL.reg = (uint16_t) (GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID(GCM_TC4_TC5)) ;
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while (GCLK->STATUS.bit.SYNCBUSY);
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TC_RESET();
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// Set TC5 16 bit
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TC5->COUNT16.CTRLA.reg |= TC_CTRLA_MODE_COUNT16;
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// Set TC5 mode as match frequency
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TC5->COUNT16.CTRLA.reg |= TC_CTRLA_WAVEGEN_MFRQ;
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TC5->COUNT16.CTRLA.reg |= TC_CTRLA_PRESCALER_DIV1 | TC_CTRLA_ENABLE;
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TC5->COUNT16.CC[0].reg = (uint16_t) (SystemCoreClock / DDS_REFCLK_DEFAULT - 1);
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TC_WAIT()
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// Configure interrupt
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NVIC_DisableIRQ(TC5_IRQn);
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NVIC_ClearPendingIRQ(TC5_IRQn);
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NVIC_SetPriority(TC5_IRQn, 0);
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NVIC_EnableIRQ(TC5_IRQn);
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// Enable TC5 Interrupt
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TC5->COUNT16.INTENSET.bit.MC0 = 1;
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TC_WAIT();
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//Configure the DAC
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analogWriteResolution(8);
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analogWrite(A0, 0);
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#else
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// Use the clkIO clock rate
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ASSR &= ~(_BV(EXCLK) | _BV(AS2));
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// First, the timer for the PWM output
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// Setup the timer to use OC2B (pin 3) in fast PWM mode with a configurable top
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// Run it without the prescaler
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#ifdef DDS_PWM_PIN_3
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#ifdef DDS_PWM_PIN_3
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TCCR2A = (TCCR2A | _BV(COM2B1)) & ~(_BV(COM2B0) | _BV(COM2A1) | _BV(COM2A0)) |
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_BV(WGM21) | _BV(WGM20);
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TCCR2B = (TCCR2B & ~(_BV(CS22) | _BV(CS21))) | _BV(CS20) | _BV(WGM22);
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#else
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#else
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// Alternatively, use pin 11
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// Enable output compare on OC2A, toggle mode
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TCCR2A = _BV(COM2A1) | _BV(WGM21) | _BV(WGM20);
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//TCCR2A = (TCCR2A | _BV(COM2A1)) & ~(_BV(COM2A0) | _BV(COM2B1) | _BV(COM2B0)) |
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// _BV(WGM21) | _BV(WGM20);
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TCCR2B = _BV(CS20);
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#endif
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#endif
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// Set the top limit, which will be our duty cycle accuracy.
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// Setting Comparator Bits smaller will allow for higher frequency PWM,
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// with the loss of resolution.
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#ifdef DDS_PWM_PIN_3
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#ifdef DDS_PWM_PIN_3
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OCR2A = pow(2,COMPARATOR_BITS)-1;
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OCR2B = 0;
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#else
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#else
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OCR2A = 0;
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#endif
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#endif
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#ifdef DDS_USE_ONLY_TIMER2
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#ifdef DDS_USE_ONLY_TIMER2
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TIMSK2 |= _BV(TOIE2);
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#endif
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#endif
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// Second, setup Timer1 to trigger the ADC interrupt
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// This lets us use decoding functions that run at the same reference
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@ -44,14 +98,10 @@ void DDS::start() {
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TCCR1B = _BV(CS10) | _BV(WGM13) | _BV(WGM12);
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TCCR1A = 0;
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ICR1 = ((F_CPU / 1) / refclk) - 1;
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#ifdef DDS_DEBUG_SERIAL
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Serial.print(F("DDS SysClk: "));
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Serial.println(F_CPU/8);
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Serial.print(F("DDS RefClk: "));
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Serial.println(refclk, DEC);
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#ifdef DDS_DEBUG_SERIAL
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Serial.print(F("DDS ICR1: "));
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Serial.println(ICR1, DEC);
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#endif
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#endif
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// Configure the ADC here to automatically run and be triggered off Timer1
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ADMUX = _BV(REFS0) | _BV(ADLAR) | 0; // Channel 0, shift result left (ADCH used)
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@ -60,14 +110,22 @@ void DDS::start() {
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DIDR0 |= _BV(0);
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ADCSRB = _BV(ADTS2) | _BV(ADTS1) | _BV(ADTS0);
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ADCSRA = _BV(ADEN) | _BV(ADSC) | _BV(ADATE) | _BV(ADIE) | _BV(ADPS2); // | _BV(ADPS0);
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#endif
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}
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void DDS::stop() {
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#ifdef __SAMD21G18A__
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TC_DISABLE();
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TC_RESET();
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analogWrite(A0, 0);
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#else
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// TODO: Stop the timers.
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#ifndef DDS_USE_ONLY_TIMER2
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#ifndef DDS_USE_ONLY_TIMER2
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TCCR1B = 0;
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#endif
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#endif
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TCCR2B = 0;
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#endif
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}
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// Set our current sine wave frequency in Hz
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@ -89,6 +147,7 @@ ddsAccumulator_t DDS::calcFrequency(unsigned short freq) {
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newStep = (600.0 / (DDS_REFCLK_DEFAULT+DDS_REFCLK_OFFSET)) * pow(2,ACCUMULATOR_BITS);
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}
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} else {
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//TODO: This doesn't work with the SAM21D... yet
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newStep = pow(2,ACCUMULATOR_BITS)*freq / (refclk+refclkOffset);
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}
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return newStep;
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@ -112,45 +171,65 @@ void DDS::clockTick() {
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if(running) {
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accumulator += stepRate;
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if(timeLimited && tickDuration == 0) {
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#ifndef DDS_PWM_PIN_3
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OCR2A = 0;
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#ifdef __SAMD21G18A__
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#ifdef DDS_IDLE_HIGH
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analogWrite(A0, pow(2,COMPARATOR_BITS)/2);
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#else
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analogWrite(A0, 0);
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#endif
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#else
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#ifdef DDS_IDLE_HIGH
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#ifndef DDS_PWM_PIN_3
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OCR2A = 0;
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#else
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#ifdef DDS_IDLE_HIGH
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// Set the duty cycle to 50%
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OCR2B = pow(2,COMPARATOR_BITS)/2;
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#else
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#else
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// Set duty cycle to 0, effectively off
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OCR2B = 0;
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#endif
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#endif
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#endif
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#endif
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running = false;
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accumulator = 0;
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} else {
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#ifdef DDS_PWM_PIN_3
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OCR2B = getDutyCycle();
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#ifdef __SAMD21G18A__
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analogWrite(A0, getDutyCycle());
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#else
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#ifdef DDS_PWM_PIN_3
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OCR2B = getDutyCycle();
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#else
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OCR2A = getDutyCycle();
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#endif
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#endif
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}
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// Reduce our playback duration by one tick
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tickDuration--;
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} else {
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// Hold it low
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#ifndef DDS_PWM_PIN_3
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OCR2A = 0;
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#ifdef __SAMD21G18A__
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#ifdef DDS_IDLE_HIGH
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analogWrite(A0, pow(2,COMPARATOR_BITS)/2);
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#else
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analogWrite(A0, 0);
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#endif
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#else
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#ifdef DDS_IDLE_HIGH
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// Hold it low
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#ifndef DDS_PWM_PIN_3
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OCR2A = 0;
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#else
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#ifdef DDS_IDLE_HIGH
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// Set the duty cycle to 50%
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OCR2B = pow(2,COMPARATOR_BITS)/2;
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#else
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#else
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// Set duty cycle to 0, effectively off
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OCR2B = 0;
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#endif
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#endif
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#endif
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#endif
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}
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}
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uint8_t DDS::getDutyCycle() {
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ddsComparitor_t DDS::getDutyCycle() {
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#if ACCUMULATOR_BIT_SHIFT >= 24
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uint16_t phAng;
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#else
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@ -173,3 +252,4 @@ uint8_t DDS::getDutyCycle() {
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scaled += 128>>(8-COMPARATOR_BITS);
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return scaled;
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}
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33
DDS.h
33
DDS.h
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@ -1,12 +1,19 @@
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#ifndef _DDS_H_
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#define _DDS_H_
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#include <Arduino.h>
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#include <avr/pgmspace.h>
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// Just a little reminder
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#ifndef __SAMD21G18A__
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#warning Experimental support for ArduinoZero. Not yet complete
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#endif
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// Use pin 3 for PWM? If not defined, use pin 11
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// Quality on pin 3 is higher than on 11, as it can be clocked faster
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// when the COMPARATOR_BITS value is less than 8
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#ifndef __SAMD21G18A__
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#define DDS_PWM_PIN_3
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#endif
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// Normally, we turn on timer2 and timer1, and have ADC sampling as our clock
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// Define this to only use Timer2, and not start the ADC clock
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@ -14,7 +21,9 @@
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// Use a short (16 bit) accumulator. Phase accuracy is reduced, but speed
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// is increased, along with a reduction in memory use.
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#ifndef __SAMD21G18A__
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#define SHORT_ACCUMULATOR
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#endif
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#ifdef SHORT_ACCUMULATOR
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#define ACCUMULATOR_BITS 16
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@ -35,10 +44,17 @@ typedef uint32_t ddsAccumulator_t;
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// 8 = 62.5kHz PWM
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// 7 = 125kHz PWM
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// 6 = 250kHz PWM
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#ifdef DDS_PWM_PIN_3
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#ifdef __SAMD21G18A__
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//TODO: 10 bit resolution for the Zero's DAC.
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//Doesn't work just yet, so keep 8-bit for now.
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#define COMPARATOR_BITS 8
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typedef uint8_t ddsComparitor_t;
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#elif defined(DDS_PWM_PIN_3)
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#define COMPARATOR_BITS 6
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typedef uint8_t ddsComparitor_t;
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#else // When using pin 11, we always want 8 bits
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#define COMPARATOR_BITS 8
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typedef uint8_t ddsComparitor_t;
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#endif
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// This is how often we'll perform a phase advance, as well as ADC sampling
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@ -46,8 +62,13 @@ typedef uint32_t ddsAccumulator_t;
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// expense of CPU time. It maxes out around 62000 (TBD)
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// May be overridden in the sketch to improve performance
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#ifndef DDS_REFCLK_DEFAULT
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#define DDS_REFCLK_DEFAULT 9600
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#ifdef __SAMD21G18A__
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#define DDS_REFCLK_DEFAULT 44100
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#else
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#define DDS_REFCLK_DEFAULT 9600
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#endif
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#endif
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// As each Arduino crystal is a little different, this can be fine tuned to
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// provide more accurate frequencies. Adjustments in the range of hundreds
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// is a good start.
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@ -61,7 +82,7 @@ typedef uint32_t ddsAccumulator_t;
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#endif
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// Output some of the calculations and information about the DDS over serial
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//#define DDS_DEBUG_SERIAL
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#define DDS_DEBUG_SERIAL
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// When defined, use the 1024 element sine lookup table. This improves phase
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// accuracy, at the cost of more flash and CPU requirements.
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@ -202,7 +223,7 @@ public:
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return refclkOffset;
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}
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uint8_t getDutyCycle();
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ddsComparitor_t getDutyCycle();
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// Set a scaling factor. To keep things quick, this is a power of 2 value.
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// Set it with 0 for lowest (which will be off), 8 is highest.
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@ -222,7 +243,7 @@ private:
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volatile ddsAccumulator_t stepRate;
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ddsAccumulator_t refclk;
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int16_t refclkOffset;
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static DDS *sDDS;
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//static _DDS *sDDS;
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};
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#endif /* _DDS_H_ */
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