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HamShield_KISS
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update afsk rx thresholds and timers

This commit is contained in:
morgan 2016-09-24 15:44:15 -07:00
parent f0cf521f23
commit d8fba41a6f
2 changed files with 22 additions and 11 deletions
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31
src/packet.cpp
View File

@ -1,6 +1,7 @@
#include <Arduino.h> #include <Arduino.h>
#include "SimpleFIFO.h" #include "SimpleFIFO.h"
#include "packet.h" #include "packet.h"
#include "dds.h"
#include <util/atomic.h> #include <util/atomic.h>
#define PHASE_BIT 8 #define PHASE_BIT 8
@ -162,7 +163,6 @@ bool AFSK::HDLCDecode::hdlcParse(bool bit, SimpleFIFO<uint8_t,AFSK_RX_FIFO_LEN>
demod_bits <<= 1; demod_bits <<= 1;
demod_bits |= bit ? 1 : 0; demod_bits |= bit ? 1 : 0;
// Flag // Flag
if(demod_bits == HDLC_FRAME) { if(demod_bits == HDLC_FRAME) {
fifo->enqueue(HDLC_FRAME); fifo->enqueue(HDLC_FRAME);
@ -279,6 +279,7 @@ bool AFSK::Decoder::read() {
while(rx_fifo.count()) { while(rx_fifo.count()) {
// Grab the character // Grab the character
char c = rx_fifo.dequeue(); char c = rx_fifo.dequeue();
//Serial.println(c);
bool escaped = false; bool escaped = false;
if(c == HDLC_ESCAPE) { // We received an escaped byte, mark it if(c == HDLC_ESCAPE) { // We received an escaped byte, mark it
escaped = true; escaped = true;
@ -349,7 +350,8 @@ bool AFSK::Decoder::read() {
} }
return retVal; // This is true if we parsed a packet in this flow return retVal; // This is true if we parsed a packet in this flow
} }
#define AFSK_ADC_INPUT 2
void AFSK::Decoder::start() { void AFSK::Decoder::start() {
// Do this in start to allocate our first packet // Do this in start to allocate our first packet
currentPacket = pBuf.makePacket(PACKET_MAX_LEN); currentPacket = pBuf.makePacket(PACKET_MAX_LEN);
@ -365,17 +367,23 @@ void AFSK::Decoder::start() {
TCCR2B = (TCCR2B & ~(_BV(CS22) | _BV(CS21))) | _BV(CS20) | _BV(WGM22); TCCR2B = (TCCR2B & ~(_BV(CS22) | _BV(CS21))) | _BV(CS20) | _BV(WGM22);
OCR2A = pow(2,COMPARE_BITS)-1; OCR2A = pow(2,COMPARE_BITS)-1;
OCR2B = 0; OCR2B = 0;*/
// Configure the ADC and Timer1 to trigger automatic interrupts
// This lets us use decoding functions that run at the same reference
// clock as the DDS.
// We use ICR1 as TOP and prescale by 8
// Note that this requires the DDS to be started as well
TCCR1A = 0; TCCR1A = 0;
TCCR1B = _BV(CS11) | _BV(WGM13) | _BV(WGM12); TCCR1B = _BV(CS11) | _BV(WGM13) | _BV(WGM12);
ICR1 = ((F_CPU / 8) / REFCLK) - 1; ICR1 = ((F_CPU / 8) / 9600) - 1; //TODO: get the actual refclk from dds
ADMUX = _BV(REFS0) | _BV(ADLAR) | 0; // Channel 0, shift result left (ADCH used) // NOTE: should divider be 1 or 8?
DDRC &= ~_BV(0); ADMUX = _BV(REFS0) | _BV(ADLAR) | AFSK_ADC_INPUT; // Channel AFSK_ADC_INPUT, shift result left (ADCH used)
PORTC &= ~_BV(0); DDRC &= ~_BV(AFSK_ADC_INPUT);
DIDR0 |= _BV(0); PORTC &= ~_BV(AFSK_ADC_INPUT);
DIDR0 |= _BV(AFSK_ADC_INPUT); // disable input buffer for ADC pin
ADCSRB = _BV(ADTS2) | _BV(ADTS1) | _BV(ADTS0); ADCSRB = _BV(ADTS2) | _BV(ADTS1) | _BV(ADTS0);
ADCSRA = _BV(ADEN) | _BV(ADSC) | _BV(ADATE) | _BV(ADIE) | _BV(ADPS2); // | _BV(ADPS0); */ ADCSRA = _BV(ADEN) | _BV(ADSC) | _BV(ADATE) | _BV(ADIE) | _BV(ADPS2); // | _BV(ADPS0);
} }
AFSK::PacketBuffer::PacketBuffer() { AFSK::PacketBuffer::PacketBuffer() {
@ -727,7 +735,8 @@ void AFSK::timer() {
tcnt = 0; tcnt = 0;
PORTD &= ~_BV(6); PORTD &= ~_BV(6);
} else { } else {
decoder.process(((int8_t)(ADCH - 128))); //decoder.process(((int8_t)(ADCH - 128)));
decoder.process((int8_t)(ADCH - 83));
} }
} }

2
src/packet.h
View File

@ -4,6 +4,7 @@
#include <Arduino.h> #include <Arduino.h>
#include <SimpleFIFO.h> #include <SimpleFIFO.h>
#include <DDS.h> #include <DDS.h>
#include <avr/pgmspace.h>
#define SAMPLERATE 9600 #define SAMPLERATE 9600
#define BITRATE 1200 #define BITRATE 1200
@ -181,6 +182,7 @@ public:
nextByte = 0; nextByte = 0;
} }
void setDDS(DDS *d) { dds = d; } void setDDS(DDS *d) { dds = d; }
//int16 getReferenceClock() { return dds.getReferenceClock(); }
volatile inline bool isSending() volatile { volatile inline bool isSending() volatile {
return sending; return sending;
} }