update afsk rx thresholds and timers
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f0cf521f23
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@ -1,6 +1,7 @@
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#include <Arduino.h>
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#include "SimpleFIFO.h"
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#include "packet.h"
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#include "dds.h"
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#include <util/atomic.h>
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#define PHASE_BIT 8
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@ -162,7 +163,6 @@ bool AFSK::HDLCDecode::hdlcParse(bool bit, SimpleFIFO<uint8_t,AFSK_RX_FIFO_LEN>
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demod_bits <<= 1;
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demod_bits |= bit ? 1 : 0;
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// Flag
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if(demod_bits == HDLC_FRAME) {
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fifo->enqueue(HDLC_FRAME);
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@ -279,6 +279,7 @@ bool AFSK::Decoder::read() {
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while(rx_fifo.count()) {
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// Grab the character
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char c = rx_fifo.dequeue();
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//Serial.println(c);
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bool escaped = false;
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if(c == HDLC_ESCAPE) { // We received an escaped byte, mark it
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escaped = true;
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@ -350,6 +351,7 @@ bool AFSK::Decoder::read() {
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return retVal; // This is true if we parsed a packet in this flow
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}
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#define AFSK_ADC_INPUT 2
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void AFSK::Decoder::start() {
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// Do this in start to allocate our first packet
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currentPacket = pBuf.makePacket(PACKET_MAX_LEN);
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@ -365,17 +367,23 @@ void AFSK::Decoder::start() {
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TCCR2B = (TCCR2B & ~(_BV(CS22) | _BV(CS21))) | _BV(CS20) | _BV(WGM22);
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OCR2A = pow(2,COMPARE_BITS)-1;
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OCR2B = 0;
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// Configure the ADC and Timer1 to trigger automatic interrupts
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OCR2B = 0;*/
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// This lets us use decoding functions that run at the same reference
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// clock as the DDS.
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// We use ICR1 as TOP and prescale by 8
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// Note that this requires the DDS to be started as well
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TCCR1A = 0;
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TCCR1B = _BV(CS11) | _BV(WGM13) | _BV(WGM12);
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ICR1 = ((F_CPU / 8) / REFCLK) - 1;
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ADMUX = _BV(REFS0) | _BV(ADLAR) | 0; // Channel 0, shift result left (ADCH used)
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DDRC &= ~_BV(0);
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PORTC &= ~_BV(0);
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DIDR0 |= _BV(0);
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ICR1 = ((F_CPU / 8) / 9600) - 1; //TODO: get the actual refclk from dds
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// NOTE: should divider be 1 or 8?
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ADMUX = _BV(REFS0) | _BV(ADLAR) | AFSK_ADC_INPUT; // Channel AFSK_ADC_INPUT, shift result left (ADCH used)
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DDRC &= ~_BV(AFSK_ADC_INPUT);
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PORTC &= ~_BV(AFSK_ADC_INPUT);
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DIDR0 |= _BV(AFSK_ADC_INPUT); // disable input buffer for ADC pin
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ADCSRB = _BV(ADTS2) | _BV(ADTS1) | _BV(ADTS0);
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ADCSRA = _BV(ADEN) | _BV(ADSC) | _BV(ADATE) | _BV(ADIE) | _BV(ADPS2); // | _BV(ADPS0); */
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ADCSRA = _BV(ADEN) | _BV(ADSC) | _BV(ADATE) | _BV(ADIE) | _BV(ADPS2); // | _BV(ADPS0);
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}
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AFSK::PacketBuffer::PacketBuffer() {
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@ -727,7 +735,8 @@ void AFSK::timer() {
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tcnt = 0;
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PORTD &= ~_BV(6);
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} else {
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decoder.process(((int8_t)(ADCH - 128)));
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//decoder.process(((int8_t)(ADCH - 128)));
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decoder.process((int8_t)(ADCH - 83));
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}
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}
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@ -4,6 +4,7 @@
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#include <Arduino.h>
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#include <SimpleFIFO.h>
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#include <DDS.h>
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#include <avr/pgmspace.h>
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#define SAMPLERATE 9600
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#define BITRATE 1200
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@ -181,6 +182,7 @@ public:
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nextByte = 0;
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}
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void setDDS(DDS *d) { dds = d; }
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//int16 getReferenceClock() { return dds.getReferenceClock(); }
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volatile inline bool isSending() volatile {
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return sending;
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}
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