50 lines
2.2 KiB
Plaintext
50 lines
2.2 KiB
Plaintext
|
###############################################################################
|
||
|
|
#
|
||
|
|
# TinyFPGA BX constraint file (.pcf)
|
||
|
|
#
|
||
|
|
###############################################################################
|
||
|
|
#
|
||
|
|
# Copyright (c) 2018, Luke Valenty
|
||
|
|
# All rights reserved.
|
||
|
|
#
|
||
|
|
# Redistribution and use in source and binary forms, with or without
|
||
|
|
# modification, are permitted provided that the following conditions are met:
|
||
|
|
#
|
||
|
|
# 1. Redistributions of source code must retain the above copyright notice, this
|
||
|
|
# list of conditions and the following disclaimer.
|
||
|
|
# 2. Redistributions in binary form must reproduce the above copyright notice,
|
||
|
|
# this list of conditions and the following disclaimer in the documentation
|
||
|
|
# and/or other materials provided with the distribution.
|
||
|
|
#
|
||
|
|
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||
|
|
# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||
|
|
# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||
|
|
# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
|
||
|
|
# ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||
|
|
# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||
|
|
# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||
|
|
# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||
|
|
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||
|
|
# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||
|
|
#
|
||
|
|
# The views and conclusions contained in the software and documentation are those
|
||
|
|
# of the authors and should not be interpreted as representing official policies,
|
||
|
|
# either expressed or implied, of the <project name> project.
|
||
|
|
#
|
||
|
|
###############################################################################
|
||
|
|
|
||
|
|
####
|
||
|
|
# TinyFPGA BX information: https://github.com/tinyfpga/TinyFPGA-BX/
|
||
|
|
####
|
||
|
|
|
||
|
|
# Left side of board
|
||
|
|
set_io --warn-no-port PIN_9 E1
|
||
|
|
set_io --warn-no-port PIN_10 G2
|
||
|
|
set_io --warn-no-port PIN_11 H1
|
||
|
|
set_io --warn-no-port PIN_12 J1
|
||
|
|
set_io --warn-no-port PIN_13 H2
|
||
|
|
set_io --warn-no-port PIN_14 H9
|
||
|
|
set_io --warn-no-port PIN_15 D9
|
||
|
|
set_io --warn-no-port USBPU A3
|
||
|
|
set_io --warn-no-port CLK B2 # input
|