TinyAdder: Add docs, organise things, updated EAGLE files.

fpga/tinyfpga/TinyAdder/README.md

@@ -0,0 +1,37 @@
+TinyAdder
+========
+
+TinyAdder is a 4-bit adder built on the TinyFPGA BX. It connects four
+slide switches (I wanted actual toggle switches, but that's how it goes)
+to a pair of 7-segment LCD displays.
+
+Code organisation
+-----------------
+
+Currently there are two modules:
+
++ SegmentLCD: a little awkwardly named due to the naming constraints,
+  but this takes a 4-bit input number and outputs a 7-bit output. The
+  hookup requirements are described in the module comments.
++ TinyAdder: This is the top-level adder.
+
+Hardware revisions
+------------------
+
++ rev1 (2018-12-22)
++ rev2 (2018-12-22): realised that the LCDs were missing resistors;
+  I had been looking at a tutorial that used a shift register; the shift
+  register apparently had an internal current limiter so I assumed the
+  LCDs didn't need them. This was wrong. Fortunately I was able to cancel
+  the rev1 order before it went out.
++ rev3 (2018-12-28): after breadboarding the push button, I realised
+  I'd messed up the schematic (and accordingly, the board) by wiring
+  both ends of the push buttons to Vcc, which... isn't very useful at
+  all. I fixed it, but not before the rev2 was sent to the fab.
+
+TODO
+----
+
++ I'd like to have the two displays show the two numbers before adding
+  them. The 'hi' display could show the first addend, and the 'low' could
+  show the second addend, with live updating.

fpga/tinyfpga/TinyAdder/SegmentLCD.v

@@ -0,0 +1,41 @@
+/// SegmentLCD represents a 7-segment display that takes as input a 4-bit
+/// number and outputs the correct pin configuration. The pins need to be
+/// wired as {G, F, E, D, C, B, A} for this to work.
+///
+/// For example,
+/// 
+///	wire [7:0]	sum = 8'b00000000;
+///	segment7 low (
+///		.number(sum[3:0]),
+///		.out({PIN_15, PIN_14, PIN_13, PIN_12, PIN_11, PIN_10, PIN_9})
+///	);
+module SegmentLCD (
+	input	[3:0]	number,
+	output	[6:0]	out = 7'b0000000
+);
+
+	always @(*)
+	begin
+		case (number)
+			4'b0000: out <= 7'b0111111; // 0
+			4'b0001: out <= 7'b0000110; // 1
+			4'b0010: out <= 7'b1011011; // 2
+			4'b0011: out <= 7'b1001111; // 3
+			4'b0100: out <= 7'b1100110; // 4
+			4'b0101: out <= 7'b1101101; // 5
+			4'b0110: out <= 7'b1111101; // 6
+			4'b0111: out <= 7'b0000111; // 7
+			4'b1000: out <= 7'b1111111; // 8
+			4'b1001: out <= 7'b1100111; // 9
+			4'b1010: out <= 7'b1110111; // A
+			4'b1011: out <= 7'b1111100; // B
+			4'b1100: out <= 7'b0111001; // C
+			4'b1101: out <= 7'b1011110; // D
+			4'b1110: out <= 7'b1111001; // E
+			4'b1111: out <= 7'b1110001; // F	
+		endcase
+	end
+
+endmodule
+
+

fpga/tinyfpga/TinyAdder/TinyAdder.v

@@ -1,35 +1,16 @@
-module segment7 (
-	input	[3:0]	number,
-	output	[6:0]	out = 7'b0000000
-);
+`include "SegmentLCD.v"
 
-	always @(*)
-	begin
-		case (number)
-			4'b0000: out <= 7'b0111111; // 0
-			4'b0001: out <= 7'b0000110; // 1
-			4'b0010: out <= 7'b1011011; // 2
-			4'b0011: out <= 7'b1001111; // 3
-			4'b0100: out <= 7'b1100110; // 4
-			4'b0101: out <= 7'b1101101; // 5
-			4'b0110: out <= 7'b1111101; // 6
-			4'b0111: out <= 7'b0000111; // 7
-			4'b1000: out <= 7'b1111111; // 8
-			4'b1001: out <= 7'b1100111; // 9
-			4'b1010: out <= 7'b1110111; // A
-			4'b1011: out <= 7'b1111100; // B
-			4'b1100: out <= 7'b0111001; // C
-			4'b1101: out <= 7'b1011110; // D
-			4'b1110: out <= 7'b1111001; // E
-			4'b1111: out <= 7'b1110001; // F	
-		endcase
-	end
-
-endmodule
-
-// look in pins.pcf for all the pin names on the TinyFPGA BX board
+/////////////////////////////////////////////////////////////////////////
+/// TinyAdder.v
+/// Author: K. Isom
+/// Created: 2018-12-27
+/////////////////////////////////////////////////////////////////////////
+/// TinyAdder is a 4-bit adder that displays calculations on a pair of
+/// 7-segment LCDs. The EXEC button doubles as a plus and equals button:
+/// the first time it is pressed, entry begins with the second number. The
+/// second time it is pressed, the sum of the two numbers is shown on the
+/// display.
 module TinyAdder (
-	input	CLK,    // 16MHz clock
 	input	PIN_1,	// A[0]
 	input	PIN_2,	// A[1]
 	input	PIN_3,	// A[2]
@@ -37,7 +18,9 @@ module TinyAdder (
 	input	PIN_5,	// EXEC
 	input	PIN_6,	// CLR
 
-	// 7-segment LCD displays
+	// There are two 7-segment displays: 'low' shows the 4 LSBs, and 'hi'
+	// shows the 4 MSBs. That is, given 0x12, 'low' would display '2' and
+	// 'hi' would show '1'.
 	output	PIN_9,	// LOW/A
 	output	PIN_10,	// LOW/B
 	output	PIN_11,	// LOW/C
@@ -57,18 +40,18 @@ module TinyAdder (
 	output	USBPU  // USB pull-up resistor
 );
 
-	// drive USB pull-up resistor to '0' to disable USB
+	// Drive USB pull-up resistor to '0' to disable USB. This prevents us
+	// from falling back into the bootloader, I think.
 	assign USBPU = 0;
 	
 	wire [7:0]	sum = 8'b00000000;
 	wire [3:0]	switches;
 
 	assign switches = {PIN_4, PIN_3, PIN_2, PIN_1};
+
 	// state determines what happens when the button is pressed.
 	reg [1:0]	state = 2'b00;
 
-	assign LED = state[0];
-
 	segment7 low (
 		.number(sum[3:0]),
 		.out({PIN_15, PIN_14, PIN_13, PIN_12, PIN_11, PIN_10, PIN_9})
@@ -79,7 +62,13 @@ module TinyAdder (
 		.out({PIN_22, PIN_21, PIN_20, PIN_19, PIN_18, PIN_17, PIN_16})
 	);
 
-	always @(PIN_5)
+	// When EXEC is pressed, the adder's state is advanced. There are
+	// three states:
+	// 	+ state 00: entry of the first number.
+	// 	+ state 01: entry of the second number.
+	// 	+ state 10: the sum of the two numbers is displayed. Pressing
+	// 	  exec again resets the display.
+	always @(negedge PIN_5)
 	begin
 		case (state)
 			2'b00: begin
@@ -89,14 +78,22 @@ module TinyAdder (
 			2'b01: begin
 				sum = sum + switches;
 				state = 2'b10;
+				LED <= 1;
+			end
+			2'b10: begin
+				sum = 8'b00000000;
+				state = 2'b00;
+				LED <= 0;
 			end
 		endcase
 	end
 
-	always @(PIN_6)
+	// When CLEAR is pressed, the adder should go back to its initial
+	// state.
+	always @(negedge PIN_6)
 	begin
 		state <= 2'b00;
-		sum = 7'b0000000;
+		sum = 8'b0000000;
+		LED <= 0;
 	end
-
 endmodule