Fix squelch threshold values for the AT1846S
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@ -855,20 +855,20 @@ bool HamShield::getSQState(){
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void HamShield::setSQHiThresh(int16_t sq_hi_threshold){
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// Sq detect high th, rssi_cmp will be 1 when rssi>th_h_sq, unit 1dB
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uint16_t sq = 137 + sq_hi_threshold;
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HSwriteWord(devAddr, A1846S_SQ_OPEN_THRESH_REG, sq);
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HSwriteBitsW(devAddr, A1846S_SQ_OPEN_THRESH_REG, A1846S_SQ_OPEN_THRESH_BIT, A1846S_SQ_OPEN_THRESH_LENGTH, sq);
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}
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int16_t HamShield::getSQHiThresh(){
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HSreadWord(devAddr, A1846S_SQ_OPEN_THRESH_REG, radio_i2c_buf);
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HSreadBitsW(devAddr, A1846S_SQ_OPEN_THRESH_REG, A1846S_SQ_OPEN_THRESH_BIT, A1846S_SQ_OPEN_THRESH_LENGTH, radio_i2c_buf);
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return radio_i2c_buf[0] - 137;
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}
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void HamShield::setSQLoThresh(int16_t sq_lo_threshold){
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// Sq detect low th, rssi_cmp will be 0 when rssi<th_l_sq && time delay meet, unit 1 dB
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uint16_t sq = 137 + sq_lo_threshold;
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HSwriteWord(devAddr, A1846S_SQ_SHUT_THRESH_REG, sq);
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HSwriteBitsW(devAddr, A1846S_SQ_SHUT_THRESH_REG, A1846S_SQ_SHUT_THRESH_BIT, A1846S_SQ_SHUT_THRESH_LENGTH, sq);
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}
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int16_t HamShield::getSQLoThresh(){
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HSreadWord(devAddr, A1846S_SQ_SHUT_THRESH_REG, radio_i2c_buf);
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HSreadBitsW(devAddr, A1846S_SQ_SHUT_THRESH_REG, A1846S_SQ_SHUT_THRESH_BIT, A1846S_SQ_SHUT_THRESH_LENGTH, radio_i2c_buf);
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return radio_i2c_buf[0] - 137;
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}
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@ -42,7 +42,7 @@
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#define A1846S_FM_DEV_REG 0x43 // register holds fm deviation settings
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#define A1846S_RX_VOLUME_REG 0x44 // register holds RX volume settings
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#define A1846S_SUBAUDIO_REG 0x45 // sub audio register
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#define A1846S_SQ_OPEN_THRESH_REG 0x48 // see sq
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#define A1846S_SQ_OPEN_THRESH_REG 0x49 // see sq
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#define A1846S_SQ_SHUT_THRESH_REG 0x49 // see sq
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#define A1846S_CTCSS_FREQ_REG 0x4A // ctcss_freq<15:0>
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#define A1846S_CDCSS_CODE_HI_REG 0x4B // cdcss_code<23:16>
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@ -154,13 +154,13 @@
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#define A1846S_C_MODE_BIT 2 // c_mode<2:0>
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#define A1846S_C_MODE_LENGTH 3
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// Bitfields for A1846S_SQ_THRESH_REG
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#define A1846S_SQ_OPEN_THRESH_BIT 9 // sq open threshold <9:0>
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#define A1846S_SQ_OPEN_THRESH_LENGTH 10
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// Bitfields for A1846S_SQ_OPEN_THRESH_REG
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#define A1846S_SQ_OPEN_THRESH_BIT 13 // sq open threshold <13:7>
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#define A1846S_SQ_OPEN_THRESH_LENGTH 7
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// Bitfields for A1846S_SQ_SHUT_THRESH_REG
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#define A1846S_SQ_SHUT_THRESH_BIT 9 // sq shut threshold <9:0>
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#define A1846S_SQ_SHUT_THRESH_LENGTH 10
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#define A1846S_SQ_SHUT_THRESH_BIT 6 // sq shut threshold <6:0>
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#define A1846S_SQ_SHUT_THRESH_LENGTH 7
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// Bitfields for A1846S_SQ_OUT_SEL_REG
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#define A1846S_SQ_OUT_SEL_BIT 7 // sq_out_sel
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