Add NumberDisplay and SwitchLED.
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module NumberDisplay (
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input PIN_1,
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input PIN_2,
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input PIN_3,
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input PIN_4,
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output PIN_9,
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output PIN_10,
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output PIN_11,
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output PIN_12,
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output PIN_13,
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output PIN_14,
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output PIN_15,
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output USBPU
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);
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assign USBPU = 0;
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SegmentLCD display (
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.number({PIN_4, PIN_3, PIN_2, PIN_1}),
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.out({PIN_15, PIN_14, PIN_13, PIN_12, PIN_11, PIN_10, PIN_9})
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);
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endmodule
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/// SegmentLCD represents a 7-segment display that takes as input a 4-bit
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/// number and outputs the correct pin configuration. The pins need to be
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/// wired as {G, F, E, D, C, B, A} for this to work.
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///
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/// For example,
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///
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/// wire [7:0] sum = 8'b00000000;
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/// segment7 low (
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/// .number(sum[3:0]),
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/// .out({PIN_15, PIN_14, PIN_13, PIN_12, PIN_11, PIN_10, PIN_9})
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/// );
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module SegmentLCD (
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input [3:0] number,
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output reg [6:0] out
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);
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always @(*)
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begin
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case (number)
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4'b0000: out = ~7'b0111111; // 0
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4'b0001: out = ~7'b0000110; // 1
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4'b0010: out = ~7'b1011011; // 2
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4'b0011: out = ~7'b1001111; // 3
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4'b0100: out = ~7'b1100110; // 4
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4'b0101: out = ~7'b1101101; // 5
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4'b0110: out = ~7'b1111101; // 6
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4'b0111: out = ~7'b0000111; // 7
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4'b1000: out = ~7'b1111111; // 8
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4'b1001: out = ~7'b1100111; // 9
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4'b1010: out = ~7'b1110111; // A
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4'b1011: out = ~7'b1111100; // B
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4'b1100: out = ~7'b0111001; // C
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4'b1101: out = ~7'b1011110; // D
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4'b1110: out = ~7'b1111001; // E
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4'b1111: out = ~7'b1110001; // F
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endcase
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end
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endmodule
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[env]
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board = TinyFPGA-BX
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###############################################################################
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#
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# TinyFPGA BX constraint file (.pcf)
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#
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###############################################################################
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#
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# Copyright (c) 2018, Luke Valenty
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are met:
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#
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# 1. Redistributions of source code must retain the above copyright notice, this
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# list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright notice,
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# this list of conditions and the following disclaimer in the documentation
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# and/or other materials provided with the distribution.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
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# ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# The views and conclusions contained in the software and documentation are those
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# of the authors and should not be interpreted as representing official policies,
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# either expressed or implied, of the <project name> project.
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#
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###############################################################################
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####
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# TinyFPGA BX information: https://github.com/tinyfpga/TinyFPGA-BX/
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####
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# Left side of board
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set_io --warn-no-port PIN_1 A2
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set_io --warn-no-port PIN_2 A1
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set_io --warn-no-port PIN_3 B1
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set_io --warn-no-port PIN_4 C2
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set_io --warn-no-port PIN_5 C1
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set_io --warn-no-port PIN_6 D2
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set_io --warn-no-port PIN_7 D1
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set_io --warn-no-port PIN_8 E2
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set_io --warn-no-port PIN_9 E1
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set_io --warn-no-port PIN_10 G2
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set_io --warn-no-port PIN_11 H1
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set_io --warn-no-port PIN_12 J1
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set_io --warn-no-port PIN_13 H2
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# Right side of board
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set_io --warn-no-port PIN_14 H9
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set_io --warn-no-port PIN_15 D9
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set_io --warn-no-port PIN_16 D8
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set_io --warn-no-port PIN_17 C9
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set_io --warn-no-port PIN_18 A9
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set_io --warn-no-port PIN_19 B8
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set_io --warn-no-port PIN_20 A8
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set_io --warn-no-port PIN_21 B7
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set_io --warn-no-port PIN_22 A7
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set_io --warn-no-port PIN_23 B6
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set_io --warn-no-port PIN_24 A6
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# SPI flash interface on bottom of board
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set_io --warn-no-port SPI_SS F7
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set_io --warn-no-port SPI_SCK G7
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set_io --warn-no-port SPI_IO0 G6
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set_io --warn-no-port SPI_IO1 H7
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set_io --warn-no-port SPI_IO2 H4
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set_io --warn-no-port SPI_IO3 J8
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# General purpose pins on bottom of board
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set_io --warn-no-port PIN_25 G1
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set_io --warn-no-port PIN_26 J3
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set_io --warn-no-port PIN_27 J4
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set_io --warn-no-port PIN_28 G9
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set_io --warn-no-port PIN_29 J9
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set_io --warn-no-port PIN_30 E8
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set_io --warn-no-port PIN_31 J2
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# LED
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set_io --warn-no-port LED B3
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# USB
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set_io --warn-no-port USBP B4
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set_io --warn-no-port USBN A4
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set_io --warn-no-port USBPU A3
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# 16MHz clock
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set_io --warn-no-port CLK B2 # input
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@ -0,0 +1,10 @@
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module SwitchLED (
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input PIN_1,
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output LED,
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output USBPU
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);
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assign USBPU = 0;
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assign LED = PIN_1;
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endmodule
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[env]
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board = TinyFPGA-BX
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@ -0,0 +1,94 @@
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###############################################################################
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#
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# TinyFPGA BX constraint file (.pcf)
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#
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###############################################################################
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#
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# Copyright (c) 2018, Luke Valenty
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are met:
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#
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# 1. Redistributions of source code must retain the above copyright notice, this
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# list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright notice,
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# this list of conditions and the following disclaimer in the documentation
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# and/or other materials provided with the distribution.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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# DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
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# ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# The views and conclusions contained in the software and documentation are those
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# of the authors and should not be interpreted as representing official policies,
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# either expressed or implied, of the <project name> project.
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#
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###############################################################################
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####
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# TinyFPGA BX information: https://github.com/tinyfpga/TinyFPGA-BX/
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####
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# Left side of board
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set_io --warn-no-port PIN_1 A2
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set_io --warn-no-port PIN_2 A1
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set_io --warn-no-port PIN_3 B1
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set_io --warn-no-port PIN_4 C2
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set_io --warn-no-port PIN_5 C1
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set_io --warn-no-port PIN_6 D2
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set_io --warn-no-port PIN_7 D1
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set_io --warn-no-port PIN_8 E2
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set_io --warn-no-port PIN_9 E1
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set_io --warn-no-port PIN_10 G2
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set_io --warn-no-port PIN_11 H1
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set_io --warn-no-port PIN_12 J1
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set_io --warn-no-port PIN_13 H2
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# Right side of board
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set_io --warn-no-port PIN_14 H9
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set_io --warn-no-port PIN_15 D9
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set_io --warn-no-port PIN_16 D8
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set_io --warn-no-port PIN_17 C9
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set_io --warn-no-port PIN_18 A9
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set_io --warn-no-port PIN_19 B8
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set_io --warn-no-port PIN_20 A8
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set_io --warn-no-port PIN_21 B7
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set_io --warn-no-port PIN_22 A7
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set_io --warn-no-port PIN_23 B6
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set_io --warn-no-port PIN_24 A6
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# SPI flash interface on bottom of board
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set_io --warn-no-port SPI_SS F7
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set_io --warn-no-port SPI_SCK G7
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set_io --warn-no-port SPI_IO0 G6
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set_io --warn-no-port SPI_IO1 H7
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set_io --warn-no-port SPI_IO2 H4
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set_io --warn-no-port SPI_IO3 J8
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# General purpose pins on bottom of board
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set_io --warn-no-port PIN_25 G1
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set_io --warn-no-port PIN_26 J3
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set_io --warn-no-port PIN_27 J4
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set_io --warn-no-port PIN_28 G9
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set_io --warn-no-port PIN_29 J9
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set_io --warn-no-port PIN_30 E8
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set_io --warn-no-port PIN_31 J2
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# LED
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set_io --warn-no-port LED B3
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# USB
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set_io --warn-no-port USBP B4
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set_io --warn-no-port USBN A4
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set_io --warn-no-port USBPU A3
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# 16MHz clock
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set_io --warn-no-port CLK B2 # input
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